I'm lost, Barts is the one that's ~ Cypress right?
Patent documents I linked earlier might suggest two cores' TMUs share a single L1. So while Barts might have the same TMU count as Cypress, the bandwidth per L1 from L2 would be much better.wrt 2 I think it might not improve with Barts (if it has same number of TMUs than Cypress), only Cayman (e.g. there could be a 2 times cache bandwidth improvement for 1.5 times the TMUs)
68** series using such low quality cooling solution. never gonna happen.
Looking at the layout, it seems to be obviously designed for a shrouded cooling setup with exhaust. I assume that particular HSF is just for the engineering sample.68** series using such low quality cooling solution. never gonna happen.
I was thinking more in terms of PWM placement and the big block of outputs than the silkscreened outline.The PCB's of late have those drawings for "shrouded cooling setup" regardless of the actual used cooler, even HD5750 which has the "egg-shaped" cooler as reference has one drawn on the PCB (and no, it doesn't match the shape of the "egg-cooler")
Have some performance details about Barts leaked ot not yet?
In fact there is a way. It is "Lack of Competition".