AMD: R9xx Speculation

Discussion in 'Architecture and Products' started by Lukfi, Oct 5, 2009.

  1. Lightman

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    Judging by the Heaven OpenGL improvement AMD fixed 1tri/clock limit! Now TessMark results should be a lot higher compared to older Radeons and not about the same.
     
  2. Kaotik

    Kaotik Drunk Member
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    AMD has officially said that HD5700 (Juniper) won't get renamed to HD6700 at least if my memory serves me right
     
  3. Babel-17

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    Huh, in that guru3d thread there's a link to some leaked drivers.

    Gives me that tessellation option in CCC. And I've only got a HD 6870.

    Lol, I guess I have to reinstall the heaven benchmark, wish I'd written down my last results.

    I only have a Q6600 processor at default speed so my results won't matter that much for any who might be curious.

    But I'll edit my post with some results if nothing crashes. ;)

    Edit: 1920 x 1080, everything at default gets me 32.7 fps.

    Switching to manual control of the tessellation level in CCC and setting the level to 64X doesn't change that really, I get 32.6 fps.

    Setting the level to 2X raise the fps to 36.2. I ran these a couple of times to make sure I wasn't transposing the numbers.

    On my 6870, OGL is busted for this benchmark, scads of missing objects.

    Guess this could be one reason the real hotfix drivers have been delayed.

    Yikes, I forgot to run a benchmark with "Use application settings". I'll only re-edit if the difference is more than 1 fps.

    Hopefully my card will still be supported in the final drivers.
     
    #7083 Babel-17, Jan 19, 2011
    Last edited by a moderator: Jan 19, 2011
  4. Psycho

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    Looks like (more or less) fixed opengl tesselation peformance, something for BlackOps, and then mostly some 6900 launch driver improvements "back-ported" to 6800.
    Should also make the 6900 Metro2033 performance more in line with expectations now.

    And ofcourse the release date has nothing todo with gtx560 reviews :yep2:
     
  5. Dave Baumann

    Dave Baumann Gamerscore Wh...
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    The tessellation control should be applicable to all DX11 boards.
     
  6. trinibwoy

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    Heh, it would be funny if a little "cap tessellation level" button from AMD is enough to counter all the effort nVidia put into high tessellation performance. If there's no IQ impact there's no cause to complain about AMD's approach.
     
  7. mczak

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    Yeah. I want the code name numbers back!

    Barts isn't really so close to Cypress due to any front-end changes, but because Cypress scales badly with simds (and is clocked slower).
    That should be much less the case for Turks vs. Juniper (well the scaling).
    I don't think so. There's roughly a 40% performance difference between HD 5670 and HD 5750. Add 15% for that additional simd (and that's probably generous), 10% for clock and that's still at least 15% slower. Don't forget it only has 8 rops, and the memory probably can't be clocked that high with Turks (it certainly couldn't with redwood).
    Also, I'm thinking increased clock compared to redwood might require pcie connector. Might not be worth it.

    Where? Haven't seen that. There would be a huge gap in the lineup, though I guess there would be nothing wrong with selling it under the old name...
     
  8. Kaotik

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    Can't find it at the moment so maybe I remember wrong, but some indication is the fact that in slides 5700's line keeps continuing
     
  9. jakobx

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    They are probably expecting that NVidia is going to pay developers to use silly tessellation levels to make them look bad. We'll see how it works, when games that actually use a lot of tessellation appear.
     
  10. Arnold Beckenbauer

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    From 11.1a's C7111972.inf:
    Looks so:
    Code:
    [[B]ati2mtag_Pre_EG[/B]]
    HKR,, Deblocking_NA, %REG_SZ%, "1"
    HKR,, MosquitoNoiseRemoval_NA, %REG_SZ%, "1"
    HKR,, DynamicRange_NA, %REG_SZ%, "1"
    HKR,, BlueStretch_NA, %REG_SZ%, "1"
    HKR,, EQAA_NA, %REG_SZ%, 1
    HKR,, MLF_NA, %REG_SZ%, 1
    HKR,, EnableUlps_NA, %REG_SZ%, 1
    HKR,, SurfaceFormatReplacements_NA, %REG_SZ%, 1
    HKR,, TFQ_NA, %REG_SZ%, 1
    HKR,, AntiAlias_NA, %REG_SZ%, 0
    HKR,, StaticGamma_NA, %REG_SZ%, "1"
    [B]HKR,, Tessellation_NA, %REG_SZ%, "1"[/B]
    
    [[B]ati2mtag_Post_EG[/B]]
    HKR, "UMD\DXVA",BlueStretch_ENABLE_DEF, %REG_SZ%, "1"
    [B]HKR, "UMD",Tessellation_OPTION_DEF, %REG_SZ%, "0"
    HKR, "UMD",Tessellation_DEF, %REG_SZ%, "64"[/B]
    HKR, "UMD\DXVA",InternetVideo_DEF, %REG_SZ%, "0"
     
  11. DarthShader

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    Am curious how (if) this tesselation control feature will work in HAWX2 and how much IQ is lost.... :wink:
     
  12. trinibwoy

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    I believe the maximum level supported by DX11 is 64x. I would love to see a game that actually made good use of that sort of compression but I'm not holding my breath. There isn't really a "silly" tessellation level in an absolute sense. It all depends on the devs.

    The two main bottlenecks that limit geometric complexity - mesh transfer over PCIe and object creation on the CPU - now both have solutions. Those being tessellation and DX11 deferred contexts respectively. That should theoretically pave the way for much richer and detailed environments. Of, course that doesnt address the greatest bottleneck of all - the dominance and lameness of console hardware :(
     
  13. DavidGraham

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  14. gongo

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  15. DarthShader

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  16. swaaye

    swaaye Entirely Suboptimal
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    If 32nm hadn't been scrapped, I imagine that Barts might have been 6700. But there's no doubt that the 256-bit bus costs money too.
     
  17. mczak

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    Though since those get hdmi 1.4a I'm wondering will retail HD57xx get that too? After all there's no true replacement of Juniper with the new chips. That article is thinking Caicos, Turks will appear only in the distant future, but I'm not sure I agree after all they have already been announced for mobile (though have not seen any hints when they might appear).

    But Barts was supposed to be on 40nm even before 32nm was canceled (since 32nm pricing was too expensive). Maybe in an ideal world with cheap 32nm all new chips would have been 32nm (without any need for rebranding old chips), though Barts supposedly would be quite small on 32nm for a 256bit interface.
     
  18. swaaye

    swaaye Entirely Suboptimal
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    Didn't know that. Some of you guys are just too edumacated for me! ;)
     
  19. Kaotik

    Kaotik Drunk Member
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    All the HD5-series chips already have HDMI 1.4a, have had since Catalyst 10.10, it was a mere software update needed for that.

    However, the 3D stuff is limited on HD5 so they can't hardware decode the MVC-streams (or whatever they were called) and they have to be run in fullscreen mode - this is now fixed in HD6700 by driving the UVD2 in different manner, just like on the HD6-branded Evergreen mobile parts did.

    Now all we need to know if one could flash HD5770 with 6770 bios to get that fixed on HD5770 too.
     
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