AMD: R9xx Speculation

[Kaotik]

less units than cypress and 20% more powerfull than 480?
are they magical stream processors?

If they remove other bottlenecks in the chip, why not? It's not like Cypress scales as well as it "should" based on clocks & sp count

 

[Bouncing Zabaglione Bros.]

less units than cypress and 20% more powerfull than 480?
are they magical stream processors?

Depends how much work they do and how fast they do it.

 

[rpg.314]

http://translate.google.cn/translate?js=y&prev=_t&hl=zh-CN&ie=UTF-8&layout=1&eotf=1&u=http%3A%2F%2Fbbs.chiphell.com%2Fviewthread.php%3Ftid%3D78057%26page%3D5%26authorid%3D2&sl=auto&tl=en

nApoleon said R9xx chip should be the time to tape out at 40nm node,less stream processors than Cypress,performance target is 10%-20% higher than GTX480.There are some changes in architecture,but it's not a totally new architecture.

More tidbits from that thread (based on my guess work from borked translation, so don't shoot me please)

-Hecaton won't improve tess perf to fermi levels
-not a major change
-32nm cancellation pushes it to Q4
-NI aka r1000 is a big change

 

[mboeller]

More tidbits from that thread (based on my guess work from borked translation, so don't shoot me please)

-Hecaton won't improve tess perf to fermi levels
-not a major change
-32nm cancellation pushes it to Q4
-NI aka r1000 is a big change

Hmm, I have read it different.

lixianglover on page one:

Q3 listing HD6750, 40nm process, the chip area of more than Cypress, less than 400 mm2, still 1600SP/256bit bit wide, divided into two 800SP modules, each of which has an enhanced off Tessellation Unit and a Rasterizer, two modules parallel-oriented graphics. Triangles rate doubled, Tessellation 3-4 times performance improvement. L2 Cache redesigned to significantly improve the performance of GPGPU. Core frequency of 900Mhz-1GHz, TDP of 225 watts or so. Target performance is 10% -20%, GTX480, expectations and GF100 B1 version of its flagship chip, the performance was flat. North Island family, the first product in the maturity process of verifying the new structure.

Q4-Q1 next year, listing HD6670/6650, single 800SP modules / 128bit bit width, Water 28nm process.
Q1-Q2 next year, listing HD6870, 28nm process, four 800SP module, 512bit-bit wide return to core area of 400-450 mm between the target performance of dual-core card Fermi suppression. In fact, R600 is the ultimate form

and

lixianglover on page five:

Within 3 years from the R600 how no action over knife SP, except with DX11 and double precision.
This change definitely better than Rv670-Rv770-Rv870 this series of improvements to be big.

so you see, you can read it both ways.

 

[mczak]

Maybe a "Fermi-like" Frontend? Cypress losses a lot of performance because of its bad Utilization.

True. Still, I think it's interesting that it would have less units - I'd have no problem believing it wouldn't increase unit count (or at least not a lot), but a lower amount but with increased performance (despite it should be "not a big change") sounds strange.
Is this part a lot like the initial planned rv870 was supposed to look like, before its die size got reduced?

 

[rpg.314]

Hmm, I have read it different.

so you see, you can read it both ways.

Is this dude reliable?

If yes, then the monster dies suggest that AMD has apparently decided to ditch all of it's gpu architecture in favor of just TMU's. Toast Making Units' that is.

 

[lixianglover]

Is this dude reliable?

If yes, then the monster dies suggest that AMD has apparently decided to ditch all of it's gpu architecture in favor of just TMU's. Toast Making Units' that is.

That's my pure guess.

 

[rpg.314]

That's my pure guess.

Fair enough.

Welcome to the forums.

 

[eastmen]

Is this dude reliable?

If yes, then the monster dies suggest that AMD has apparently decided to ditch all of it's gpu architecture in favor of just TMU's. Toast Making Units' that is.

kinda sounds like from the naming (6750) this part is really made for 28nm. Perhaps it was to be the 32nm refresh instead of 40nm.

With cancelation of 32nm and 28nm sounding like its next year ati needed a part and thus is putting this out.

 

[rpg.314]

kinda sounds like from the naming (6750) this part is really made for 28nm. Perhaps it was to be the 32nm refresh instead of 40nm.

To me the entire speculated product line up looks quite sensible. Test new architecture (6750) on an older process. And then feed back the experience into 6870 which is a X2-on-chip on new process, to beat fermiX2.

With cancelation of 32nm and 28nm sounding like its next year ati needed a part and thus is putting this out.

Gpu design schedules are long enough to prevent this easy turning of the ship.

 

[Kaotik]

To me the entire speculated product line up looks quite sensible. Test new architecture (6750) on an older process. And then feed back the experience into 6870 which is a X2-on-chip on new process, to beat fermiX2.

I don't think 6870 or whatever it'll be will be any more "X2-on-chip" than Cypress is "HD4870X2 on chip", the "2 modules" are probably just the same as Cypress already has, 2 separated sets of stream processors

 

[eastmen]

To me the entire speculated product line up looks quite sensible. Test new architecture (6750) on an older process. And then feed back the experience into 6870 which is a X2-on-chip on new process, to beat fermiX2.
Gpu design schedules are long enough to prevent this easy turning of the ship.

It really depends on how long ati has known about the 32nm being canceled. I suspect it was more that the pat would come out on 40nm be be moved to 32nm . Which is why its a 6750 instead of a 59x0 series or a 68x0 series.

 

[rpg.314]

I don't think 6870 or whatever it'll be will be any more "X2-on-chip" than Cypress is "HD4870X2 on chip", the "2 modules" are probably just the same as Cypress already has, 2 separated sets of stream processors

By that, I meant it will be 6750X2 on a chip a like gf00 is X4 on a chip. lixian was pretty clear on geometry being parallelized.

 

[fellix]

It's reasonable to think of a Cypress refresh w/ tweaked setup stage. Cypress is essentially RV770 times two, minus the bus width and the setup rate, so I guess doubling triangle rate would come as something "natural" to the architecture (we certainly won't see 512-bit interface any time soon).
I wonder if this was a part of the canceled 480 mm² Cypress design?

 

[rpg.314]

It's reasonable to think of a Cypress refresh w/ tweaked setup stage. Cypress is essentially RV770 times two, minus the bus width and the setup rate, so I guess doubling triangle rate would come as something "natural" to the architecture (we certainly won't see 512-bit interface any time soon).
I wonder if this was a part of the canceled 480 mm² Cypress design?

Improved setup/raster/tess shouldn't take ~150mm2 area. :smile:

Sideport definitely got canned. May be they'll put in a HT link in 6870 to allow putting these babies directly into sockets.

 

[Mindfury]

A记最近Tapeout的全系列RV9xx都是40nmTSMC，没有28nm。硬件增强了TES，增加3D蓝光硬解码。3DMark Vantage没多大提高
cfcnc 发表于 2010-3-29 21:07

From cfcnc@Chiphell，Rv9xx series was taped out at TSMC 40nm node recently.Tessellation is enhanced,3D blueray hardware-decode is added.No big improvement in 3DMark Vantage.

 

[rpg.314]

From cfcnc@Chiphell，Rv9xx series was taped out at TSMC 40nm node recently.Tessellation is enhanced,3D blueray hardware-decode is added.No big improve in 3DMark Vantage.

So not much improvement in bogo-flops and bogo-gbps. Lixian is on track so far.

 

[neliz]

So not much improvement in bogo-flops and bogo-gbps. Lixian is on track so far.

Argh! they only show performance in 3dmark, no wonder the refresh beats Fermi in those numbers... :/

 

[rjc]

A记最近Tapeout的全系列RV9xx都是40nmTSMC，没有28nm。硬件增强了TES，增加3 D蓝光硬解码。3DMark Vantage没多大提高

From cfcnc@Chiphell，Rv9xx series was taped out at TSMC 40nm node recently.Tessellation is enhanced,3D blueray hardware-decode is added.No big improvement in 3DMark Vantage.

I translated the above as: "A to note recently Tepeout whole series of RV9xx all are 40nm, doesn't exist 28nm hardware to strenghthen TES, to increase Blu Ray decoding quality, 3D Mark Vantage not much increase"

Is the part in bold correct "tapeout whole series"? Supposedly there are 3 chips in Hectoncheires(?sp aarrggh)

 

[Psycho]

I wonder how much chiphell / TSMC know about possible 28nm gpu tape outs i Dresden?

Seems obvious to do a 28nm evergreen (juniper?) shrink pipe-cleaner at the same time as the functionally improved 40nm highend..