Would anyone with half a clue more than I have care to comment on power distribution wrt. cypress? TIA
But still, 160 or 192 VLIW units (pro and XT => 800/960 SPs with xyzwt or only 640/768 with xyzt) appears to be quite on the low side to reach close to Cypress performance. They really need to have widened some bottlenecks to get that performance.
As far as I can tell the throughput for XYZT would be the same as XYZWT in all three of these tests.
But I think it rules out XYZW with emulated transcendentals.
It uses the typical "slot power only" arrangement, the small tab in the slot being power.Would anyone with half a clue more than I have care to comment on power distribution wrt. cypress? TIA
RPE is a convincing sounding name, but the only time we've seen it is on the slide where Barts is shown clearly with Caicos and Cayman blurred.If Barts is really 2 RPE and Cayman 3 RPE (whatever those actually are...), pretty much no matter how I look at it Cayman would be barely 50% larger than Barts.
I estimate Barts is 13.7x17.3=237mm². 50% larger than that would make Cayman 356mm².Now, if Barts is indeed 230mm² that would put Cayman at - nearly exactly the same die size as Cypress...
Charlie's original rumour that [STRIKE]Southern[/STRIKE]Northern Islands would have a Northern Islands Frontend mated to an Evergreen shadercore seems to be the true one afterall.
In what way are they abandoning the sweet spot strategy?
NVidia introduced GF100 first and only got GF104 out 3 months ago. That's what the old strategy looks like. AMD is introducing the sweet spot chip first, and judging by its die size and performance, they're doing exactly what they did with the RV7xx except this time NVidia won't be squeaking out a marginal victory at the $400+ price point.
I'm dubious that math is a meaningful bottleneck. Additionally, NVidia's approach to bottlenecks shows that in some games (e.g. Far Cry 2) math is seemingly irrelevant.But still, 160 or 192 VLIW units (pro and XT => 800/960 SPs with xyzwt or only 640/768 with xyzt) appears to be quite on the low side to reach close to Cypress performance. They really need to have widened some bottlenecks to get that performance.
What do you think about an increase in practical texture fill-rate on NI-chips?
The situation now:
http://techreport.com/articles.x/19242/6
So if AMD is able to reach the same per texel real-time performance as on Juniper, Barts and Cayman may reach the following performance numbers:
Barts XT (64 TMUs @ 900MHz?): ~28,9 GTex/s -> 5870+11%
Cayman XT (96 TMUs @ 900MHz?): ~43,4 GTex/s -> 5870+67%
The reported tests don't seem to provide any insight on XYZT versus XYZWT, so I can't see how they could provide any insight on other combinations of lanes to achieve trascendentals - so I'm not even going there (there was a discussion of these possible alternative setups back in April I think it was).What about a possible split + distributed T lane over the remaining units?
But if Barts is really only a 12 SIMD chip with the traditional Evergreen layout, it has not 64 TMUs but Barts XT has just 48 and Barts Pro only 40, same number as Juniper XT. I guess that is only going to work, if the TMUs itself are somewhat changed as patents mentioned by Jawed suggest. It would be nice to see a higher L1 cache bandwidth as it would enable to sustain a higher trilinear and aniso filtering speed (and quality btw.) compared to bilinear filtering like observed with GF100/104.Texture architecture seems really a point where was/is potential:
Well we already knew that Barts was on a 5850 PCB, diff components, I heard and posted that a long time ago, shortly after the "pin to pin compatiability" rumor.
I thought so too by just eyeing it.Well by the looks of it, earlier measurements of 230mm^2 seem spot on.
Oh, didn't see that. imageshack pics don't show up at work unfortunately. Well at least I tagged it for later, thanks.I thought Bart had already been measured?
It's not 5850 PCB, it's just same sized, other than size the PCB layouts are completely differentWell we already knew that Barts was on a 5850 PCB, diff components, I heard and posted that a long time ago, shortly after the "pin to pin compatiability" rumor.
What I got out of this article by Anand is that there is a good chance that this generation may include something really big even though the Sweetspot strategy had been being successful.So AMD sees Nvidia do Epic Fail with GF100, and decides to abandon their hugely successful sweet-spot strategy after one generation and follow the same route as Nvidia with a giant 300 watt single chip that bleeds heat like a nuclear furnace?
HD 6850 is based on AMD's new Barts GPU, built on the 40 nm process. The source mentions that the SKU will have 800 stream cores enabled, from earlier reports we're lead to believe that these stream cores are individually more complex than AMD's traditional 5D (4 simple + 1 complex) approach to unified shaders.