AMD: R9xx Speculation

5850 is already just a notch above 200, isn't it? Launch prices don't count, cause that's not what people base their buying decisions on.

5850 is still selling starting @ $259 on Newegg (a couple cards are $239 after MIR), the original MSRP over a year after release.
 
Don't underestimate the stupidity of the customer. Not just those who haven't got a clue, but those who have a little bit of knowledge and think they know a lot more than they do. Most everyone thinks bigger/newer number = better (or that it should be). Those are the expectations.

Lets not overestimate that either. I think most people when they are gonna buy something try to inform themselves first. Im talking about the hard working average individual here who make out the majority. Noone wants to see that hard earned cash go pouffe by not making an informed descision. Where they get that information and if its accurate or not is another story. LOL
 
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Don't underestimate the stupidity of the customer. Not just those who haven't got a clue, but those who have a little bit of knowledge and think they know a lot more than they do. Most everyone thinks bigger/newer number = better (or that it should be). Those are the expectations.

back your claims up and dont use dependent clauses like that. at the least do a survey or something.
 
I can't imagine someone buying a 3D card can't be bothered to bingoogle a benchmark or fifty of cards in their price range--even people buying whole PCs and upgrading the preinstalled video card. And if such a person exists and can be tricked in buying the same thing they already have (sidegrading), then is it worth putting up so much of a fuss over them?

I mean, I railed against renaming trickery as much as the next guy (good luck even finding the 9100 on ATI's site), but at some point it's too easy to educate yourself about something to use ignorance as an excuse. It's not like they're buying "AAA"-rated securities. It would take them 60 seconds to make sure they're not throwing $100+ down the drain.

I'm not defending shifting what I thought was a nicely established convention for business reasons (read: suckers), but there's a limit to consumer coddling.
 
I'd hope that people spending $400 on a video card would spend a little more time researching... esp. since video cards are a pretty niche market (not mainstream), compared to say someone blowing $400 on an ipad or something
 
Quote from Charlie D. @S|A about Barts:

http://www.semiaccurate.com/forums/showthread.php?p=75463#post75463

<200mm² card would indeed be very impressive :LOL:

I hate to disagree with Charlie as he's usually well-informed, but I personally don't think that Barts is a <200mm² chip ... it just doesn't add up.

(1) More shaders than Juniper (lowest rumored number is 960)
(2) bigger size shader-per-shader than Juniper (as argued by charlie himself, a 4-shader NI group should be about as big as a 5-shader Evergreen group)
(3) a 256bit memory interface practically confirmed
(4) Juniper is 166mm²

... do the math.
 
I would agree with Mianca.

Maybe he just misinterpreted what he was told ("the same number of SPs fit in just 10% more space" are something along that line). Either the Evergreen series carries the weight of quite some unnecessary stuff or the 256bit memory controller alone would bring a Juniper close to the 200mm² mark. But never say never, maybe they pull off another RV770 and cram all the new and supposedly improved stuff into a RV670 like size.

It will be quite interesting to see how they tackled the bottlenecks of the Evergreen architecture resulting in a 960SP part (if that is the number) reaching or even surpassing a 1440SP HD5850.
 
Using current architecture, Juniper + 16 ROPs + 128bit interface + 2 SIMDs ~ 220-225mm².

But I don't believe, that adding 2 SIMDs and 16 ROPs took them more than a year. It's very likely they cleaned the architecture a bit. Saving of 10% die-space isn't definitely impossible.
 
(2) bigger size shader-per-shader than Juniper (as argued by charlie himself, a 4-shader NI group should be about as big as a 5-shader Evergreen group)

I'll take issue with this statement. Why would removing the T unit do anything but decrease the size of the ALUs?
 
What if 6870 will be faster in DX11? ;)

It's a new generation, it's supposed to be quicker. The name certainly doesn't help that. I would've also preferred a 67xx name for Bart as the price range would suggest it a better moniker than 68xx.

Either way I won't care and will wait rather for Cayman.
 
Using current architecture, Juniper + 16 ROPs + 128bit interface + 2 SIMDs ~ 220-225mm².

But I don't believe, that adding 2 SIMDs and 16 ROPs took them more than a year. It's very likely they cleaned the architecture a bit. Saving of 10% die-space isn't definitely impossible.
If that's really only ~200mm² and the HD6870 is faster than HD5850, that would be quite fantastic. IMHO everything closer in die size to Juniper rather than Cypress (so below 250mm²) would put AMD (again) in very good position against nvidia (if the claimed performance numbers are true) - a chip the size of GF106 but faster than GF104 (well ok nvidia could still release that full GF104 which could catch up but still that would be definitely a more costly chip).
Not that I think perf/area can't improve (certainly on 40nm rv740 easily beats anything from the Cypress family in that area) I just don't think it will improve that much.
 
The rumored maximum TDP of ~150W for Barts, the low memory clock of ~1000MHz and the single crossfire-connector, should all have effects on die-size and needed pin-out.
RV770@260mm² had two crossfire-connectors, a crossfire-sideport and a TDP translated in todays TDP of ~180W.
 
In which case it should have just been called 67xx if it's coming in at a lower price. The ONLY reason to call it a 68xx is to deceive and mislead the consumer. Hence, it is complete fail, IMO.

Not to mention making a complete mockery of the consistent and practical naming scheme since 3xxx. We're basically going back to the dark ages of naming schemes where performance is just randomly assigned numbers with virtually no consistency. Again, even more fail...

Regards,
SB

The ONLY reason? A return to the DARK AGES? Aren't you pushing out a bit too much hyperbole here?

Whats going to happen when they release the 78xx cards? If say a 2-300mm^2 card is all they have for the high end then they'll have to do what they are doing now then. They are trying to return to the sweet spot and consistant naming. Since the 7 series GPUs on 28nm have been developed since they went to the sweet spot in terms of die area it is quite likely that it will share more similar charactaristics with Barts in terms of die size. So if Cayman was 68xx then they would have to do what they are doing now and go for an inconsistant generational change because its possible that their 28nm high end may not be faster than Cayman or may be around the same performance.
 
The rumored maximum TDP of ~150W for Barts, the low memory clock of ~1000MHz and the single crossfire-connector, should all have effects on die-size and needed pin-out.
RV770@260mm² had two crossfire-connectors, a crossfire-sideport and a TDP translated in todays TDP of ~180W.
I'm not sure that 12% or so compared to juniper/cypress max lower memory frequency makes much of a difference area-wise (btw nvidia would probably take issue with the statement that "memory clocks are low"...). Also, I was more thinking along the lines of a comparison to Juniper which has none of the additional stuff you listed (plus a lower TDP to boot).
 
It will be quite interesting to see how they tackled the bottlenecks of the Evergreen architecture resulting in a 960SP part (if that is the number) reaching or even surpassing a 1440SP HD5850.
HD5850 = 18 SIMD : 1440 ALUs * 725 MHz = 2088 GFLOPS

16 SIMD : 1280 ALUs * 900 MHz = 2304 GFLOPs (+10% vs HD5850)
14 SIMD : 1120 ALUs * 900 MHz = 2016 GFLOPs (-4% vs HD5850)
12 SIMD : 960 ALUs * 900 MHz = 1728 GFLOPs (-20% vs HD5850)

If we put aside all optimizations, Bart needs 1120 ALUs to match the HD5850.
It's almost impossible to match HD5850 performance with only 960 ALUs.
 
It's almost impossible to match HD5850 performance with only 960 ALUs.
I agree .. Evergreen must suck at shader performance for that scenario to happen , not to mention texture performance too , a 960 ALU part will have fewer TMUs than HD5850 , far fewer than even a 1280 ALU part .

So ,either these performance numbers are false , or Barts is really a 1280 ALU part .
 
I'll take issue with this statement. Why would removing the T unit do anything but decrease the size of the ALUs?
Because you can't just "remove" the T unit without somehow compensating for its specific functionality?


Nevertheless, I have to correct myself with respect to the "Charlie himself said that a cluster of 4 NI shaders is about as big as a cluster of 5 EG shaders" statement. I somehow got that mixed up.

In fact, Charlie just said that each individual NI shader should be somewhat bigger than each individial Evergreen shader.

Still, let's just say that, according to a very rough rule of thumb, 1/3 of Juniper should be shaders. Then just adding 20% more of the same shaders (800 -> 960) would add about ~ 11mm² of die space. Factor in that the "new" shaders are, shader-for-shader, somewhat more complex and (thus) bigger - and die size should grow even more: According to charlies "A group of 4 NI shaders is smaller than a group of 5 EG shaders", the upper limit of increase would be <25%, but let's just go with an assumed 10% increase in the size of each individual shader for the sake of this rough guesstimation here. Then 166mm²/3*1.2 (minimum increase in shader count)*1.1 (conservative assumption for the increase in individual shader-size) gives you ~ 73mm², i.e. an 18mm² increase over the assumed ~ 55mm² of die space devoted to shaders assumed for Juniper.

So the new shader-design alone would put Barts @ 184mm. That'd leave 16mm² for
(a) the rumored doubling of ROPs
(b) the (practically confirmed) doubling of the memory interface
(c) the rumored 60% increase in TMU count (40 -> 64)
(d) the direly needed optimizations in tesselation performance

Even presupposing that they will most probably save some die space due to expected die space optimizations, I still personally don't see how (a) to (d) could be pulled off within a <200mm² die size budget.

And finally: If they actually managed to apply a few magic tricks to really achieve this miracle, that would indeed be most impressive from a sheer perf/mm² perspective - but it would also make me wonder why a Barts chip only slightly bigger than Juniper (1) had to be branded 68** after all (I'm really in favor of companies improving on their profits, but there's a difference between improving on you profits and becoming greedy) and (2) why such a rather small chip would still draw ~ 50% more power than Juniper (cf. the rumored >150W) ...

Now, I know that even neliz (whom I respect even more than Charlie) hinted at something like "GTX 470 performance @ 1/3 of the die size" a few pages earlier in this thread - but that just
(a) seems too good to be true and
(b) would really make me wonder how <200mm² could honestly be marketed as the new "sweet spot"?
(c) how many AMD engineers sold their souls to the perf/mm² devil to actually achieve (at least) HD 5850 performance @ just 60% of Cypress' die size?
 
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