AMD: R9xx Speculation

No one ever said it would be a good answer!

 

Nvidia's "answer" will be 6-12 mths later. Whether that's based on GF104 or not is anybody's guess.

 

Probably because gddr5 uses differential data signals, which needs more wires.

 

That being said, I've been thinking...

If the rumor that Barts/Cayman will be multi RPE chips is true and that there will be a Tesselation unit in each one of the RPEs, what kind of performance increase are we looking at? If each RPE has a Tesselation unit that is as much capable as Cypresse's, would it be safe to assume that Barts, being a supposed 2 RPE part, could be twice as fast in tesselation? Could they scale linearly?

I am talking about theoretical tesselation performance here, not framerate. I do understand that there are other factors that could not let it scale 100% on every engine.

 

He leaked more of them (and removed them quite early), but I didn't save it. I remember he leaked also the slide with feature-set (expreview leaked content of this one, too) and some less interesting ones...

 

Hadn't seen the last of those, but otherwise VLIW-5 seems reasonable.

 

Cypress replacements seem to be incoming: HD 5870 @ $299.

So rumors about Evergreen SIMDs at Northern Islands front-end could be true. But hopes about massively reworked TMUs and a NV-HQ-equivalent AF might be diminished.

 

As far as I know, those rumors were started by Charlie, and he later went back on them. So I for one am dismissing them.

 

But Gipsels analysis of the driver code showed a different ALU-configuration (4 components instead of EGs 5) of a chip family called "NI" and 2 months ago catalyst 10.8 was released with the known codenames of upcoming cards also combined with the "NI".

These were all informations from AMD. Or were these disinformation?

 

I don't think so. There is a speculation that in SI the shaders will be even further improved, something like 3D, not as the expected 4D in NI.

 

Sorry, my post was ambiguous. I mean the rumors about SI (now NI) having Evergreen shaders + NI (now SI, I know, it's confusing) "uncore" were started by Charlie, who later stated that NI (that is, the real NI ) would have 4D shaders.

In other (and much simpler) words, I think the HD 6000 series will indeed have 4D shaders.

You have to admit, abstract codenames such as Evergreen and Northern/Southern Islands serve their purpose very well: they confuse the hell out of anyone trying to figure things out.

 

Except GDDR5 has SE data lines, not differiential.

The excess traces/pads are mainly for clock (outgoing clocks) and power (same power + less voltage = higher current = more solder balls needed)

 

May be command bus is differential then, I seem to remember that gddr5 used some differential signalling.

 

I don't think anything new has emerged on that subject. I've talked about texture architecture patent documents but I don't know of any other information.

http://forum.beyond3d.com/showpost.php?p=1453118&postcount=1025

I tend to find Gipsel's findings pretty compelling.

http://www.interfacebus.com/GDDR5-Memory-IC-Pinout.html

Just clocks.

 

My view on them is that the now upcoming lineup is in fact "SI" due the island names, the rumored other "NI/SI" island names lineup had all but one island norther than these 4.

So "NI" in the names would point out it's "NI family", but NI family would be divided between the SI (HD6) and actual NI (HD7?) due 32nm being cancelled.

 

OBR was wrong before. One never knows.

 

I'm trying to remember the last time he was right ...

 

e.g. Bart's ≠ HD6700

But I can't remember any other example...

 

This silly season is sooo boring, it's not worthy of the silly season nickname Were the f are the leaks??

During Rv770 pre-launch speculation, he said he was dissapointed by Gt200, because he saw 4850CF prowess . He went on and off saying he had a 4850, that he was gonna post pics blah blah, but then said amd asked him not to xD

 

Haven't seen this posted yet.

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