AMD: Navi Speculation, Rumours and Discussion [2019-2020]

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That looks like a monster, but standard, CPU cooler. Does anybody know how much heat it is supposed to dissipate? That would give us indirectly a rough measure of what is the expected power consumption of the chip.
 
That looks like a monster, but standard, CPU cooler. Does anybody know how much heat it is supposed to dissipate? That would give us indirectly a rough measure of what is the expected power consumption of the chip.
I was thinking the same thing, initially, but it really depends on the fans.
A standard generic aircooler like that would probably be ok-ish at 100-150w but that is assuming they are trying to keep noise in check.
Throw any noise requirements out the window and slap a pair of 4k RPM fans and that max of ~150w could potentially jump to ~200-250w, we just don't know.

I thought something similar about the power connector, but the connector out of view is the one that typically would be the variable on a 2pci-e connector board. For an ES, it most likely is 2x8pin even if the specific bin will use <200w.
 
I was thinking the same thing, initially, but it really depends on the fans.
A standard generic aircooler like that would probably be ok-ish at 100-150w but that is assuming they are trying to keep noise in check.
Throw any noise requirements out the window and slap a pair of 4k RPM fans and that max of ~150w could potentially jump to ~200-250w, we just don't know.

I thought something similar about the power connector, but the connector out of view is the one that typically would be the variable on a 2pci-e connector board. For an ES, it most likely is 2x8pin even if the specific bin will use <200w.

150W was also my assumption. This, together with the 256bit bus, makes me think we're looking at an engineering sample of the 'midrange' NAVI
 
I think someone said a month or so ago (I cannot remember who) that there would have been no "Highest end Navi" boards from the partners until next year and that AMD would present only reference boards for it (under strict supervison). Now Idk if this is true but it could fit with the fact we are seeing information from AIB partners about the mid-high range part and not thre true 80CU chip.
 
I think someone said a month or so ago (I cannot remember who) that there would have been no "Highest end Navi" boards from the partners until next year and that AMD would present only reference boards for it (under strict supervison). Now Idk if this is true but it could fit with the fact we are seeing information from AIB partners about the mid-high range part and not thre true 80CU chip.
Yes. And it could also fit with AMD launching full pack RDNA2 the same day: navi 21 (reference only for now), navi 22 (reference and AIB or just AIB directly with no reference), Navi 23 (same as navi 22)...hopefully, and yesterday they only talked about rdna2 in general.
 
I think someone said a month or so ago (I cannot remember who) that there would have been no "Highest end Navi" boards from the partners until next year and that AMD would present only reference boards for it (under strict supervison). Now Idk if this is true but it could fit with the fact we are seeing information from AIB partners about the mid-high range part and not thre true 80CU chip.
Yeah, that looks like Navi22.
Yes. And it could also fit with AMD launching full pack RDNA2 the same day: navi 21 (reference only for now), navi 22 (reference and AIB or just AIB directly with no reference), Navi 23 (same as navi 22)...hopefully, and yesterday they only talked about rdna2 in general.
Navi23 will be later.
 
Also why would anyone at AMD send anyone a picture like this? Both terrible as a technical document and looks terrible as marketing material too.
The tweet says the leak was “recreated to avoid implication.“ No idea about it’s veracity.
 
FfJp2WY.jpg
I've come up with plenty of clangers over the years, but anyway, here's my theory:

AMD has built a 40CU GPU that has a 256-bit GDDR6 memory interface, an HBM interface and an Infinity Fabric interface.

For 6700 and 6600 GPUs, a single GPU die is connected to GDDR6. HBM and IF interfaces are both unused.

For 6800 and 6900 GPUs, a pair of GPUs are connected to each other via IF and they each connect to a chunk of HBM. The GDDR6 interfaces are unused.

For what it's worth, the numbers relating to HBM seem off-putting: it doesn't appear to be a rational alternative to GDDR6 in the current environment. The only way I can see this being justified is that it's a "test" card for fully chipletised HBM-centric RDNA3.
 
My uneducated guess is that 256bit GDDR6 and 2xHBM paths are too big to fit in a medium size die in a cost effective way.
 
Latest leak (always take leaks with a grain of salt);

Big Navi is supposedly somewhere between the RTX 3070 and RTX 3080 when it runs at 275W.
If it reaches 300W, it can match the RTX 3080.
That is with 16GB of RAM.
 
AMD has built a 40CU GPU that has a 256-bit GDDR6 memory interface, an HBM interface and an Infinity Fabric interface.
So this would be a GPU version of 2017's Zeppelin.


For 6700 and 6600 GPUs, a single GPU die is connected to GDDR6. HBM and IF interfaces are both unused.

For 6800 and 6900 GPUs, a pair of GPUs are connected to each other via IF and they each connect to a chunk of HBM. The GDDR6 interfaces are unused.

I'd like to speculate something on top of this:

- Each chip has 40 CUS, one HBM2E PHY and 192bit GDDR6 PHYs capable of up to 18Gbps memory, using the experience with Microsoft's consoles AMD is now able to offer uneven chip capacities and all chips on desktop cards get a game clock at >~2.1GHz. Each chip is 250-280mm^2.

- Radeon 6600 uses a single 36 CU chip with 192bit 16Gbps GDDR6 for 6, 8 (using uneven chips) or 12GB at 384GB/s -> $250-300
- Radeon 6700 uses a single 40 CU chip with 192bit 18Gbps GDDR6 for 8 (uneven chips) or 12GB at 432GB/s -> $350-400
- Radeon 6800 uses 2*36 CU chips with 192bit 16Gbps GDDR6 for 12 or 16GB (uneven chips) at 768GB/s (basically 2x Radeon 6600) -> $500-550 with performance right below the RTX 3080
- Radeon 6900 uses 2*40CU chips with 2*HBM2E stacks from SK Hynix rated at 3.6Gbps/pin for a total 920GB/s, 8GB each stack for total 16GB. -> $700-750 with performance between RTX3080 and RTX 3090. Similar Pro or Prosumer cards could arrive with two 16GB stacks and sold for over $1000.

Aftermarket Radeon 6900 cards appearing in Q1/Q2 2021 can use higher game clocks on the > 2.3GHz range and overclocked 4.2Gbps/pin stacks from Samsung for 1073GB/s bandwidth.

The HBM2E PHY can then be used on single chips with premium mobile solutions.
E.g.: Macbook Pro's Radeon Pro 6600M has single 40 CU chip undervolted and clocked at ~1.65GHz (8.5TF) and a single 8GB underclocked/undervolted HBM2E chip at 2.4Gbps/pin, meaning 307GB/s -> similar performance to desktop RX5700.
 
So this would be a GPU version of 2017's Zeppelin.




I'd like to speculate something on top of this:

- Each chip has 40 CUS, one HBM2E PHY and 192bit GDDR6 PHYs capable of up to 18Gbps memory, using the experience with Microsoft's consoles AMD is now able to offer uneven chip capacities and all chips on desktop cards get a game clock at >~2.1GHz. Each chip is 250-280mm^2.

- Radeon 6600 uses a single 36 CU chip with 192bit 16Gbps GDDR6 for 6, 8 (using uneven chips) or 12GB at 384GB/s -> $250-300
- Radeon 6700 uses a single 40 CU chip with 192bit 18Gbps GDDR6 for 8 (uneven chips) or 12GB at 432GB/s -> $350-400
- Radeon 6800 uses 2*36 CU chips with 192bit 16Gbps GDDR6 for 12 or 16GB (uneven chips) at 768GB/s (basically 2x Radeon 6600) -> $500-550 with performance right below the RTX 3080
- Radeon 6900 uses 2*40CU chips with 2*HBM2E stacks from SK Hynix rated at 3.6Gbps/pin for a total 920GB/s, 8GB each stack for total 16GB. -> $700-750 with performance between RTX3080 and RTX 3090. Similar Pro or Prosumer cards could arrive with two 16GB stacks and sold for over $1000.

Aftermarket Radeon 6900 cards appearing in Q1/Q2 2021 can use higher game clocks on the > 2.3GHz range and overclocked 4.2Gbps/pin stacks from Samsung for 1073GB/s bandwidth.

The HBM2E PHY can then be used on single chips with premium mobile solutions.
E.g.: Macbook Pro's Radeon Pro 6600M has single 40 CU chip undervolted and clocked at ~1.65GHz (8.5TF) and a single 8GB underclocked/undervolted HBM2E chip at 2.4Gbps/pin, meaning 307GB/s -> similar performance to desktop RX5700.

Sounds like a lot of effort to have HBM to then only use it on the top consumer chip.
 
- Each chip has 40 CUS, one HBM2E PHY and 192bit GDDR6 PHYs capable of up to 18Gbps memory, using the experience with Microsoft's consoles AMD is now able to offer uneven chip capacities and all chips on desktop cards get a game clock at >~2.1GHz. Each chip is 250-280mm^2.
We appear to have a picture of a 256-bit board.

The HBM2E PHY can then be used on single chips with premium mobile solutions.
E.g.: Macbook Pro's Radeon Pro 6600M has single 40 CU chip undervolted and clocked at ~1.65GHz (8.5TF) and a single 8GB underclocked/undervolted HBM2E chip at 2.4Gbps/pin, meaning 307GB/s -> similar performance to desktop RX5700.
https://www.amd.com/en/graphics/radeon-apple-5000m-series

HBM2, which appears to be using 2x4GB chips to achieve a total bandwidth of 394MB/s.

HBM2(E) could save a lot of board power compared with the GDDR6 configuration, which would help with clocking the GPU at >2x the GDDR6 variants.
 
I'm not hopping on the Navi 2x chiplet silly train.
AMD said a chiplet/mcm approach would be much easier for HPC and we haven't even seen their new HPC GPU.

But back to the three ASICs we are fairly certain of and the new info from the ES picture.
Why couldn't it be the "Big Navi" but cutdown?

Thinking of something like this-
highend
$649 80CU@2ghz 384bit 16Gbps 24GB ~RTX3080
$549 72CU@1.8ghz 384bit 16Gbps 24GB >RTX3070
$449/$399 64CU@1.6ghz 256bit 16Gbps 16GB/8GB <RTX3070 (~2080Ti)

midrange
$299 40CU@2.2ghz 256bit 8GB ~2080vanilla
$249 36CU@2.1ghz 256bit 8GB ~5700xt
$199 32CU@2ghz 192bit 6GB ~5700

mainstream
<$150 20CU 128bit 4GB

Edit- added pricing speculation.
2nd Edit- Fixed midrange CUs and added clocks.
 
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We appear to have a picture of a 256-bit board.
Is there any indication on that picture that points to 256bit? I only see 3 areas for memory chips, everything else is too dark and blurred to understand.
Besides, this could be some engineering sample card completely unrelated to RDNA2..


https://www.amd.com/en/graphics/radeon-apple-5000m-series

HBM2, which appears to be using 2x4GB chips to achieve a total bandwidth of 394MB/s.

HBM2(E) could save a lot of board power compared with the GDDR6 configuration, which would help with clocking the GPU at >2x the GDDR6 variants.

You're right. I guess they could instead use a single HBM2E but at the rated 3.2Gbps/pin, so they'd go from 394GB/s on two stacks to a single stack doing 410GB/s.


Sounds like a lot of effort to have HBM to then only use it on the top consumer chip.
Top consumer chip and low-power premium chip.
Remember that Vega 12 and Navi 12 were developed for being put exclusively inside one laptop model of one laptop maker.
 
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