Is there any truth to a silicon revision to the RV670 die?
Looks like they have 3870 over 900 MHz now with no increase in voltage.
source
Hey everyone - look! It's what R600 should've been.
Is there any truth to a silicon revision to the RV670 die?
Looks like they have 3870 over 900 MHz now with no increase in voltage.
source
Hey everyone - look! It's what R600 should've been.
If only it had the 512bit bus... I'm sure it would hit memory bandwidth limits at 900Mhz core.
If only it had the 512bit bus... I'm sure it would hit memory bandwidth limits at 900Mhz core.
Based on what?Considering it's still 16 RBEs, I'd be quite surprised if that where the case under 90% of possible scenarios.
Just one thing that popped to my mind.. since it's apparently established now that the PLX chip is 3 port 48 lane chip - what about when you add another X2 beside your first one, will it communicate straight with one of the chips on the 1st board or what?
Perhaps there's something similar to this going on with the PLX bridge:
Precisely. And with 2.25-2.5GHz GDDR4 to back it up, RV670 is anything but bandwidth-deficient.
Slightely OT but if RV670 is anything but bandwidth limited with 72GB/s then what on earth is the use of Xenos having 256GB/s connected to a considerably weaker core?
Based on what?Considering it's still 16 RBEs, I'd be quite surprised if that where the case under 90% of possible scenarios.
Not to mention that the bandwidth you're talking about is between the shader and edram/rop core of Xenos, not the whole thing and the main memory.
Maybe I read your post wrong, but the 256GiB/s is between the ROPS/Z-etc and the 10MiB eDRAM. The bandwidth between the eDRAM die and the shader core is 32GiB/s.
He was talking about R600, so I kinda assumed it would be stuck with the order of the day, which if I remember correctly was 1.8Ghz mem?
I don't think the scenarios are even remotely comparable.
Why aren't they comparable? Its a pretty simple comparison.
What makes the Xenos core capable of using 256GB/s while the R670 core cannot use 72GB/s?
Its not a "Xenos is in a console" thing because being in a console doesn't mean you use more bandwidth, if anything it would mean less because its being used more efficiently.
I acknowledge felix's statement about the lack of compression, thats a valid point and if the consensus is that its that, and that alone which is responsible for the disparity then fine. But if its not (and it would be pretty incredible if compression alone could have such a huge effect) then I can only see 2 possibilites:
Xenos cannot use 256GB/s and thus some, or even much of that bandwidth is wasted.
RV670 is bandwidth limited at 72GB/s, at least in some circumstances even at 720p.
No dude. The EDRAM itself was thought out for very particular cases, namely 4X AA and 720p rendering and was planned in such a way as to provide supposedly free AA. For further Xenos detailing ask Jawed because he loves that chip, I haven't really dealt with it much.
Let's ignore the fact that Xenos is a tad more primitive in the way it handles memory communication(the lack of compression techniques and so on). Bear in mind the memory arrangement IT DOES have, with the UMA and its 700MHz only clock. I don't know how many titles currently use tiling/the EDRAM, so how can you evaluate its impact on Xenos, aside from giving a big figure to quote?Not to mention that for the life of me I can't understand how can a valid comparison between a console GPU and a desktop one be made, all things considered.
Care to show me how you determined that Xenos can/cannot use 256GB/s and how RV670 is BW limited at 720p under MOST circumstances?Could it be under some circumstances?Perhaps. Are those common enough?Probably not or there would've been a significant Delta between it and the R600, considering the BW delta that exists and the fact that they're pretty much the same basic architecture, bar some tweaks.
Now you've made me read up on Xenos:http://www.beyond3d.com/content/articles/4/3