115.2 GFLOPS ? (Xbox360 triple core CPU)
- Thread starter Megadrive1988
- Start date
Using 2 threads per core, predictions here have ranged from 8, 10 and 16 Flops per cycle per core. With 8 and 2 Flops per cycle (FMADD) being attributed to VMX and FPU units respectively.
What's interesting here is that this spec is saying it's 12 Flops per cycle per core,
--> 12 Flops/cycle/core*3cores*3.2 GHz ~ 115.2 GFlops
So where's the 12 Flops/cycle coming from? It can only be attributed to 2 execution units because of 2-way SMT.
Option 1.
VMX~ 8 Flops/cycle???
FPU~ 4 Flops/cycle???
Option 2.
VMX~ 10 Flops/cycle???
FPU~ 2 Flops/cycle???
With option 2, the VMX unit does a vector and scalar op per cycle (FMADD). Just like the rumoured unified ALUs can in the X360's GPU (R500) from the original 'leak' of last year. Nice surprise if true!
Option 1 doesn't make sense unless the FPU can do a 4-way vector op (non-FMADD), providing 4 Flops per cycle. Similar to a SSE or 3DNow! unit. This would be a nice surprise too!
Or the above 115.2 GFlops is wrong and it's 10 Flops per cycle per core which is 96 GFlops @ 3.2GHz!
Thoughts
EDIT:
Had option 1 and 2 the wrong way round!
What's interesting here is that this spec is saying it's 12 Flops per cycle per core,
--> 12 Flops/cycle/core*3cores*3.2 GHz ~ 115.2 GFlops
So where's the 12 Flops/cycle coming from? It can only be attributed to 2 execution units because of 2-way SMT.
Option 1.
VMX~ 8 Flops/cycle???
FPU~ 4 Flops/cycle???
Option 2.
VMX~ 10 Flops/cycle???
FPU~ 2 Flops/cycle???
With option 2, the VMX unit does a vector and scalar op per cycle (FMADD). Just like the rumoured unified ALUs can in the X360's GPU (R500) from the original 'leak' of last year. Nice surprise if true!
Option 1 doesn't make sense unless the FPU can do a 4-way vector op (non-FMADD), providing 4 Flops per cycle. Similar to a SSE or 3DNow! unit. This would be a nice surprise too!
Or the above 115.2 GFlops is wrong and it's 10 Flops per cycle per core which is 96 GFlops @ 3.2GHz!
Thoughts
EDIT:
Had option 1 and 2 the wrong way round!
Neeyik said:Basic grammar LB - note the word "also" after the full stoplondon-boy said:
Err... Sowwee!
london-boy said:Hehe 48 pipelines? and embedded ram
9 Billion what?[/quote]
Dot Products as mentioned by others. I googled this recently...
http://mathworld.wolfram.com/DotProduct.html
http://mathworld.wolfram.com/DotProduct.html
Translation: It is a number that is a good indicator for how well a chip may perform when dealing with poly meshes, lighting and shadowing, and physics. Looks like the Xbox 360 can do about 150M of these per frame at 60fps.
MechanizedDeath
Regular
Jaws said:So where's the 12 Flops/cycle coming from? It can only be attributed to 2 execution units because of 2-way SMT.
Option 1.
VMX~ 8 Flops/cycle???
FPU~ 4 Flops/cycle???
Option 2.
VMX~ 10 Flops/cycle???
FPU~ 2 Flops/cycle???
With option 2, the VMX unit does a vector and scalar op per cycle (FMADD). Just like the rumoured unified ALUs can in the X360's GPU (R500) from the original 'leak' of last year. Nice surprise if true!
Slightly off-topic, but does this jive with the math you were trying to do for the extra VMX unit on the PPE in Cell? Has IBM fine-tuned their VMX units, or would this be a custom jobber for the XeCPU. I honestly have no clue since I don't code. PEACE.
MechanizedDeath said:Jaws said:So where's the 12 Flops/cycle coming from? It can only be attributed to 2 execution units because of 2-way SMT.
Option 1.
VMX~ 8 Flops/cycle???
FPU~ 4 Flops/cycle???
Option 2.
VMX~ 10 Flops/cycle???
FPU~ 2 Flops/cycle???
With option 2, the VMX unit does a vector and scalar op per cycle (FMADD). Just like the rumoured unified ALUs can in the X360's GPU (R500) from the original 'leak' of last year. Nice surprise if true!
Slightly off-topic, but does this jive with the math you were trying to do for the extra VMX unit on the PPE in Cell? Has IBM fine-tuned their VMX units, or would this be a custom jobber for the XeCPU. I honestly have no clue since I don't code. PEACE.
Yeah, it would fall inline with a special sauce, super VMX unit(s). Though the ones in the CELL DD2 die shots look identical and guestimates would be, if true, 16 Flops per cycle for the PPE with 2 VMX units.
But for the X360 CPU, it seems to be 12 Flops per cycle per core and these two execution units would be different. I find the 115.2 GFlops a curious number, not something that would be a 'typo', yet AFAICS, no one else has reported this figure... :?
Either case the CELL PPE and X360 CPU are likely to have customised VMX unit(s) per core compared to current PPC VMX units, IMHO...
It'd be nice to have some official confirmation before we speculate too much.
But I imagine the most likely explanation would be dual SIMD (regular FPU turning into 2-way SIMD when working in single precision, like Gekko), so you get 4-way + 2-way instructions per clock.
But personally I don't see much real world benefits for this, and not sure if it's worth it entirely as a marketting stunt.
Megadrive1988
Veteran
what I don't understand, is why is Xbox1's 733 Mhz Intel CPU now rated at just over 1.4 GFLOPs? (that's roughly the same as DC's SH4). I thought it was around ~3 GFLOPs.
overclocked
Veteran
Dont get all dizzy by the Flop rating MD.
Megadrive1988
Veteran
my head is spinny. (whir whir whir whir) and its only going to get worse as Playstation3 and Revolution get unveiled (even if only partly) in 3-4 days.
PC-Engine said:I'm very impressed by what MS and IBM has achieved here. This is more than enough cpu power for next generation games and more than anyone predicted and even at a lower 3.2GHz clock.
Everyone had predicted around 80GFLOPS peak at 3.5GHz. Using that esimate at 3.2GHz it would've been ~70 GFLOPs.
I've seen Microsoft numbers of 72 GFLOPS and 84 GFLOPS for a 3Ghz CPU. Now they're claiming 115 with a 7% speed boost? Like I said, they keep changing it, it's just spin.
claims that running 2 threads per core to double performace sounds like smoke an mirrors to me.
not only that, programmers need to execute code with no less than six threads to program such a cpu successfully.
since a cell cpu with 4 spp would require only five threads, I wonder why ms feels their box is easier to program? And that still provides the cell with more power. Also I don't understand where all these development tools magically appear from? Are they planning to use apple development tools to compile c++ on a mac? lol. because thats what the devoloper kits are, apparently.
not only that, programmers need to execute code with no less than six threads to program such a cpu successfully.
since a cell cpu with 4 spp would require only five threads, I wonder why ms feels their box is easier to program? And that still provides the cell with more power. Also I don't understand where all these development tools magically appear from? Are they planning to use apple development tools to compile c++ on a mac? lol. because thats what the devoloper kits are, apparently.
MightyHedgehog
Newcomer
How do you guys come up with such detailed FLOP ratings for a chip that hasn't been fully-revealed yet? Unless there's some hard info out there, I'm just clueless about that (and generally clueless about all of this tech stuff anyway )
)lip2lip said:
There's a lot more to what makes a system easy/difficult to develop for than the number of processing cores it has, and as for development tools magically appearing - have you never heard of Visual Studio and DirectX for example? I don't get the point about C++ on Mac though ...