Xenos Questions

[Dave Baumann]

There's still a lot of questions floating around in several threads. Although I presently have some knowledge, I'm still hoping to get a call with the ATI guys to get further details - if you still have questions put them here and we'll see what we can get answered. Lets keep the discussion down in this thread, just questions:

 

[DemoCoder]

Explain how the tiling system works exactly
HDR (FP16)+MSAA supported?

 

[Vaan]

1080i/p + MSAA supported?

 

[blakjedi]

How many flops is supported by the GPU?

Are the fpu operations within the eDRAM included?

 

[991060]

1.How do they recommend using the CPU L2 cache => GPU data path?

2.What does the "64 active threads" mean exactly? Isn't it not enough to cover the texture read latency? And how many TMUs does the GPU have?

3.What made them think the 4D+1D design is better than other alternative(such as a 3D+1D+1D approach, which can also work as 3D+2D)? And what operations is the scalar unit capable of ?

4.Is there any difference on performance between using FP32 and FP16(if the GPU supports this internal format)?

5.The GPU's efficiency on dynamic branching.

6. Number of MRTs? Number of interpolators between vertex shader and pixel shader visible to the programmers?

 

[Titanio]

How does 5 floating point ops per unit per cycle = one vec4 and one scalar op simultaneously? Or is it 10flops per unit per cycle?

(Sorry if this was already clarified)

 

[Brimstone]

What speed and quality advancements have been achieved with anistropic filtering?

Does Xenos have an A.A. mode similar to the Matrox Fragment Anti-Aliasing method?

Any new compression technologies?

 

[991060]

How does 5 floating point ops per unit per cycle = one vec4 and one scalar op simultaneously? Or is it 10flops per unit per cycle?

(Sorry if this was already clarified)

I think the vec unit is capable of 8 ops/clock(2 ops per channel), while the scalar unit can only do 1 ops/clock.

 

[DemoCoder]

Does the R500/XB360 have a TDMS transmitter or is everything forced through a RAMDAC and is analog?

 

[Dave Baumann]

Xenos has no display capabilities at all.

 

[DemoCoder]

That's why I said R500/XB360. If the transmitted isn't integrated on-chip, it must be on the mainboard. If there is no pure digital out interface on the exterior, it can't be added later.

So I'll reiterate my question. Does the X-Box 360 only have a RAMDAC, or does it support digital video out? Surely, they must know.

 

[Johnny Awesome]

Will the video encoder in the X360 convert games written in 720p to 1080i for those of us with sets that don't support 720p?

 

[DemoCoder]

Most HDTVs will upconvert themselves.

 

[Johnny Awesome]

Mine won't. That's why I'm asking.

 

[Geeforcer]

Try as I might, I still can't find that shadercore-EDRAM bandwidth answer. Has it been explained? If so could anyone point me to it? If not, that would be my question.

 

[Luminescent]

Some info on the HOS processor would be nice.

 

[ninelven]

erased

 

[DeathKnight]

Mine won't. That's why I'm asking.

Really, that is pretty suprising. What is your TV if you don't mind my asking?

Uh, a lot of "earlier" HDTV's (including the majority of direct-view CRT HDTV's) do not accept 720p signals. I myself have a 27" Samsung CRT HDTV and it does not accept 720p signals. Samsung's CRT HDTV's did not accept 720p signals until their TXP line.

 

[ninelven]

erased

 

[Dave Baumann]

Please observe the post request...