XENON to have two PPC Cores?

Phil said:
^^ that's only the case if the power voltage is equal on 65nm (which it shouldn't be) though :?:

There are some equations I could dig up but a simple analogy...

Say one CELL PE is 200mm2 die on 90nm process, do you think you can join 4PEs to make a 800mm2 die, still on 90nm and keep the SAME 4GHz clock and expect to generate the SAME amount of heat?
 
I wasn't suggesting that at all. Of course a chip 4x the size and 4x the transistors will equal more heat (but more heat per mm^2?)!

What I was tryingt to point out as a possible flaw in your thumb rule was that a chip using a smaller process will also need less power circulating the transistors. I was under the impression that because of this, heat shouldn't be necessarely more on the smaller process at the same clock speed.

I.E:
heat(x PE at y GHz on 90nm) != heat(x PE at y GHz on 65nm)

Therefore, more PEs at 4 GHz should be possible using the 65nm process until the heat == the same amount as 1PE at 4GHz on 90nm. The question is, how many?

If my assumption is incorrect, please correct me. :)
 
While it would be great if they put 4 PEs in the PS3, that's probably not feasible costs-wise.

Especially if the 1PE configuration already outperforms the competition, at least on benchmarks.
 
Phil said:
I wasn't suggesting that at all. Of course a chip 4x the size and 4x the transistors will equal more heat (but more heat per mm^2?)!

What I was tryingt to point out as a possible flaw in your thumb rule was that a chip using a smaller process will also need less power circulating the transistors. I was under the impression that because of this, heat shouldn't be necessarely more on the smaller process at the same clock speed.

I.E:
heat(x PE at y GHz on 90nm) != heat(x PE at y GHz on 65nm)

Therefore, more PEs at 4 GHz should be possible using the 65nm process until the heat == the same amount as 1PE at 4GHz on 90nm. The question is, how many?

If my assumption is incorrect, please correct me. :)

Okay, I see your point but that's not the point I was making! :D

I'm keeping the process constant, i.e. choose whatever Xenon launch process is, say 65nm...and on that process, they could clock high with 2 cores or clock lower with 3 cores.

That's one explanation for a dual core. Another would be that they targetted 3 cores at 65nm but for whatever reason they have to launch on 90nm and are forced to go with 2 cores for the CPU. Hope that's clearer... :)
 
Jaws said:
It's a simple rule of thumb

I don't give much for that rule of thumb. When ATi was about to release its R300 chip, people SWORE up and down there was no chance it'd clock over 300MHz and it would most probably be under since it had over 100M transistors. What happen? ATi set everybody up the bomb when the chip launched at 325MHz.

Useless rule of thumb, IMO.
 
Guden Oden said:
Jaws said:
It's a simple rule of thumb

I don't give much for that rule of thumb. When ATi was about to release its R300 chip, people SWORE up and down there was no chance it'd clock over 300MHz and it would most probably be under since it had over 100M transistors. What happen? ATi set everybody up the bomb when the chip launched at 325MHz.

Useless rule of thumb, IMO.

300-->325Mhz is such a small order of magnitude. The rule of thumb is for larger order of magnitudes than a 10% swing in clock...
 
256 gflops: game over, Microsoft. There's no way MS can match the 256 gflops performance of cell with just a two-core PowerPC processor, right DeanoC?
 
bbot said:
256 gflops: game over, Microsoft. There's no way MS can match the 256 gflops performance of cell with just a two-core PowerPC processor, right DeanoC?

The R500 GPU could have comparable performance to one CELL...
 
Jaws said:
bbot said:
256 gflops: game over, Microsoft. There's no way MS can match the 256 gflops performance of cell with just a two-core PowerPC processor, right DeanoC?

The R500 GPU could have comparable performance to one CELL...

Agreed. Cell is going to be doing a hell of a lot more work than Xenon's cpu. nVidia is only developing a rasterizer, not a GPU, everything else will be done by Cell.
 
Jaws said:
bbot said:
256 gflops: game over, Microsoft. There's no way MS can match the 256 gflops performance of cell with just a two-core PowerPC processor, right DeanoC?

The R500 GPU could have comparable performance to one CELL...

Mabye , Also even if the power pc chip in the xenon is dual core only , we don't know exactly how many chips are going into it .

So lets wait and see . 256gflops out of the cpu is nice
 
Jaws said:
The R500 GPU could have comparable performance to one CELL...
No f'n way, at least if you want to count programmable performance and not fixed hardware stuff like texture filtering/lookups etc...
 
Guden Oden said:
Jaws said:
The R500 GPU could have comparable performance to one CELL...
No f'n way, at least if you want to count programmable performance and not fixed hardware stuff like texture filtering/lookups etc...

If you believe in the leaked Xenon diagram :D ...then the R500 GPU @500 Mhz is ~ 240 GFlops, comparable to 1PE CELL...
 
I quoted that guy before, he seems to hint that Xbox2 CPU is a G5 derivative. He seems to have alot of pride in IBM, being an employee there I suppose made him a tad bias, but I suppose he is insightful ?
 
Right, so basically now we have the Next XCPU with 2 or 3 full G5 based cores, and PS3 with 1 full PPC core and 8 SPEs. Maybe 2 and 16 if we're lucky.
That's very... different.
 
Agreed. Cell is going to be doing a hell of a lot more work than Xenon's cpu. nVidia is only developing a rasterizer, not a GPU, everything else will be done by Cell.
Is this just your speculation, or do you have some proof for it? Last I've heard, from nVidia's director mouth - is that they're making a GPU for PS3, based on their next gen GPU technology.
 
The PPC cores that will be in Xbox are modified G5's, I thought that was well known. They have been modifed quite extensively apparently.
 
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