Xbox 360 Shortage Caused By Low Xenon Yields...Is Cell Affected?

[nelg]

I wonder if this an IBM problem only or if it is also with Chartered.

 

[Hardknock]

Didn't we find out a few months ago that Xenos yields were excellent. So much so that people were wondering if MS could bump up the clock speed.

There was no official word on that, just some random poster that claimed to have "talked to someone" from ATi or something or other...

 

[Alpha_Spartan]

In the end, it's really difficult to say anything about how "slightly less than expected" yields for Xenos relates to Cell yields.

To even begin any discussion at all, we'd have to know relative chip sizes...and then we'd have to make some complete guesses / assumptions as to typical error rate per wafer for both architectures...pretty fruitless.

I was thinking more generally. IBM is fabbing both chips, and with Cell being larger, does this bode well, worse or about the same for it? Or since Cell has redundant structures, does it improve yields significantly to counteract any fabbing issues.

 

[avaya]

I was thinking more generally. IBM is fabbing both chips, and with Cell being larger, does this bode well, worse or about the same for it? Or since Cell has redundant structures, does it improve yields significantly to counteract any fabbing issues.

Ceteris paribus, Cell should have a better yield than XeCPU thanks to SPE redundancy.

However all things are not equal. Everyone's taking a stab in the dark at the points of contention.

 

[arjan de lumens]

That's why I said without redundancy. There is no reason to count with redundancy here because we must assume both chips have some level of redundancy/masking. If we strip this component we see that the Cell has an advantage due to structure and implementation.

True, as the Xenon has much more logic that cannot easily be redundancy-protected. It's just that on certain components, like on-chip L2 cache, non-redundant solutions are so rare that they are practically meaningless to bring into real-life yield considerations (similar to how e.g. calculating texture memory bandwidth of a GPU without taking into account the texture cache gives a meaningless number).

 

[Shifty Geezer]

Didn't we find out a few months ago that Xenos yields were excellent. So much so that people were wondering if MS could bump up the clock speed.

I don't remember that being more than a rumour, but I guess given the redundancy in Xenos (there's an extra shader array for redundancy IIRC) and none at all in XeCPU, it does seem the likely culprit.

 

[Dave Baumann]

Well, as much has been suggested to me by sources that are somewhat more reliable than "I overheard this guy...".

 

[Jawed]

Xenos appears to have an extra shader array for redundancy purposes:

and one of the whitepapers says, mysteriously, that Xenon has redundancy built into the core (along with heaps of debugging hardware).

Jawed

 

[Synergy34]

Initial PS3 Cells will all be fabbed by IBM.

Link please, is this common knowledge or are you just guessing here? I would be suprised if IBM is going to be producing the only chips for the launch, considering they are doing 360 and Rev chips at the same time, plus all the other chips they make.

 

[wireframe]

FWIW, I am going to speculate that it is not hard errors that are causing problems with Xenon. I would think it has a lot more to do with tolerances. People sometimes forget that just because a CPU fails at a certain frequency, only part of the logic may be failing at that clock. That is, a critical gate or series of gates may be failing while the rest of the die is quite happy. Microsoft obvioulsy wanted their Xbox out quickly and I think there were some rumors about downclocking the core before release. Now, those may have been completely unfounded, but I will lean on the side of it being partially true: that the core is operating near the tolerance boundary and that Microsoft opted for lower usable yields (remember, they only have one yield bracket, and cannot scale frequency). This also plays into the whole overheating issue (unless that is completely PSU related). It could simply be hotspots in the design that can be addressed with minor fixes.

I would not be surprised if a "simple" mask revision solves this, but a completely new layout may be under way while the current supply is being managed into retail. Does anyone have an idea of what revision core the Xbox is using? I would assume it is a very low revision number due to time-to-market needs. I also would not be surprised if we see a complete re-spin before going 65nm. This is all based on the fact that this CPU seemed to "pop out of nowhere" and probably was not as refined as it could or can be.

EDIT: I should have mentioned "process refinements" in the above. In other words, being this close to the boundary of tolerance, it would seem likely that small tweaks can help to incerase yields.

 

[Joe DeFuria]

Wireframe,

That sounds very reasonable to me....basically, a very 'unrefined' chip that is still going through the process of addressing the 'low hanging fruit' to bump up yields. It may be that there are actually a couple different Xenon revisions already in retail products, based on the fact that there are a couple different motherboard revisions.

 

[zidane1strife]

No. If there is a single defect (that is not masked) in one of the three Xenon cores then the entire chip is defective (or core where the error occurs, if you will). In Cell you can have that one defect and you're lucky if it's in one SPE; then you just disable that SPE. You are thinking backwards. The more independent and non-crucial components you have in a chip the less likely you are to have a total loss.

In the case of Cell you have 8 SPEs and 7 need to be working. If the PPE is defective the whole unit goes. Think errors over an area. The SPEs cover roughly two thirds of the die. Let's forget redundancy and assume any error will be a complete loss in that unit of the CPU.

If you have a single error in the PPE you lose
If you have a single error in the L2 cache you lose
If you have a single error in the EIB you lose
If you have a single error in the memory interface or FlexIO you lose
If you have a single error in the SPE region you win (because you disable the affected SPE)

With Xenon you lose all the time. You don't have a redundant core to disable.

The amount of redundancy increases the probability of a functional chip. In the case of the Cell you have an entirely redundant SPE. The fact that the SPEs cover a significant area increases the probability that an error will be located in an SPE.

Not to mention given the aim of cell, you've two defective spes you win, three, four, five? no problem, cell's meant to be used in a wider market just stuff it in a cell product that requires less spes/performance say an HDtv or a blu-ray drive. Cell's design is simply brilliant, they're gonna be able to use/sell most cells .

Also let's not forget with cell being fabbed for a while, sony probably had a good guess what lvl of defective spes they'd likely need to get their desired yield. If they'd thought it necessary they could've gone with 6 or 5 functional spes. And again while not relevant to ps3 cell yields, we've to understand that unlike other chips, the cell can likely have far more defective parts/spes and still be used/sold in another product, which'd likely go at a slight premium, it's a gold mine.

 

[Mythos]

maybe Sony executives were aware of MS fabing issues....

" Tretton on Microsoft's impact of a head start with xbox 360 "I dont' think it's a matter of time, but rather a matter of units."

 

[mckmas8808]

"We're getting a little less, but not much less than the yields we expected, and we know that the yields we expected will probably outrun supply."

DOesnt sound like a huge problem, but just enough to put htem behind the supply curve. The article itself is a little too "gloom and doom" if all they are going by is the quote above.

Well MS said that they consider delaying the launch right?

 

[Joe DeFuria]

Well MS said that they consider delaying the launch right?

But they didn't.

 

[zidane1strife]

But they didn't.

No choice if they wanted to be first mover, you couldn't launch right agaisnt the PR-BEHEMOTH.

 

[Joe DeFuria]

No choice if they wanted to be first mover, you couldn't launch right agaisnt the PR-BEHEMOTH.

Of course they had a choice.

If the yield issue was severe enough, they would basically have no choice but to delay the launch.

 

[chachi]

Ceteris paribus, Cell should have a better yield than XeCPU thanks to SPE redundancy.

All things being equal, I'd expect Cell will have worse yields, though not as bad as if they were going for all 8 SPEs. Cell short one SPE is still quite a bit larger than the 360 CPU. I imagine there's redundancy built in for the register files, L2 caches and LS for everything though so who knows. The difference is that theoretically there will be a use for Cells that fail complete certification (> 1 SPEs fail).

Anyway the idea that IBM can't provide enough CPUs... perish the thought. It's not like they've ever had that sort of problem before or anything... somewhere Steve Jobs is smiling.

 

[robofunk]

You wonder if MS can use dud chips for something useful (asuming cores can be shutdown if defective, or underclocked). Maybe server farms based on duds. What has AMD and Intel been doing with defective dual cores?

 

[typoEDR]

You wonder if MS can use dud chips for something useful (asuming cores can be shutdown if defective, or underclocked). Maybe server farms based on duds. What has AMD and Intel been doing with defective dual cores?

They are making treehouses out of defective CPUs.