Was posted somewhere on Nintendo branded headed paper.
Therefore it simply must be legit.
So double confirmed?
Was posted somewhere on Nintendo branded headed paper.
Therefore it simply must be legit.
Code name: Nadir
Architecture: z/Architecture
# Of Processors: IFL01 derivative + zIIP02 derivative
# Of Cores: 6 (Kernel mode 2 cores)
# Of Threads: 12
Operating frequency (processor 01) : 920MHz
Operating frequency (processor 02): 262MHz
Instruction set: 64 bit
Endianness (?): Big Endian
specialty engines... are approximately one-quarter to one-fifth of the price of a standard engine.
the z196 can also have cores configured as specialty processors for supporting Linux (IFL) or for accelerating Java and XML processing (zAAP) or DB2 databases (zIIP).
Level 3 (L3) cache: 12MB per core (eDRAM)
Why bother with the how? It's all lies. Someone made some shit up, spending any time whatsoever analyzing it is a waste of your life.Im trying to figure out how they came up with this.
It's also untrue. That tiny CPU die couldn't fit that much eDRAM (unless it was practically all eDRAM). Again, waste of time thinking about it.So thats all together 72MB of eDRAM
Why bother with the how? It's all lies. Someone made some shit up, spending any time whatsoever analyzing it is a waste of your life.
It's also untrue. That tiny CPU die couldn't fit that much eDRAM (unless it was practically all eDRAM). Again, waste of time thinking about it.
It's speculation on what's in Wii U, and not Fantasy Console League.Well its a thread for speculation.
Whether its based on facts, fantasy, or rumors.
So, from what I understand, Nintendo/IBM could have taken either six z9, z10 or z11 cores, and configure them as specialty cores. So, they could have configured one as a zIIP one as a IFL, and maybe one or two for BROADWAY bc?
At any rate, assuming rumor is true, could all these specialty cores be giving developers initially a hard time?
Note that the 500 stream processor count doesn't make any sense in the context of this rumor. AMD's VLIW5 architectures always had a granularity of 1 SIMD unit, which contained 80SPs. That would mean the stream processor count would need to be divisible by 80; 480 and 560 would be the closest counts that work.
How does that Memory bandwidth calculation work with those specs BTW?
To be honest I'm almost offended that I have to read that sort of garbage linked by MDX over here.
I didnt link it, I only offered the translation to the article.
And what was your point in bringing my name up?
It's eDRAM - it's extremely fast.So either the integrated 32 megs of ram is extremely fast and has high bandwidth.
What makes you think it even needs to? The 1MB texture cache of the GC&wii is an outdated design. Current GPUs texture dozens of times more effectively than these crappy old chips (counting low, no doubt.)Quick check: the Radeon 78xx doesn't have enough memory to emulate the 1 megs texture cache of the Broadway.
While it doesn't change your conclusion VLIW5 had shipping configurations with 40 SPs per SIMD.Note that the 500 stream processor count doesn't make any sense in the context of this rumor. AMD's VLIW5 architectures always had a granularity of 1 SIMD unit, which contained 80SPs. That would mean the stream processor count would need to be divisible by 80; 480 and 560 would be the closest counts that work.