Tesla, Quadro, and GeForce have all used the same chips. The upcoming generation will continue to use the same chips (G92 across product lines, we assume). NV sees double precision as a way to drive people to Tesla instead of just developing with standard GeForce cards, so it will somehow be disabled on the GeForce boards (similar to the differences between Quadro and GeForce that has existed for years). Maybe through drivers, maybe through BIOS stuff, nobody knows. That's what they mean by feature differentiation, though--take the same chip and create different products for different segments of the market from it.
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No no no no no, Tim, I was talking about the interaction and the cost of interaction between the CPU, GPU and in different platforms(AMD and Intel). I just put up another thread and I am not sure if you could answer the questions maybe here or there.
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1. Nvidia claims that there is no direct mapping between video memory and main memory. So when you have the following simple block digrams:
--> CPU --> L1 --> L2 --> MM(Main memory) --> VirtualM(I/O) for the CPU datapath
--> GPU --> SPs w/register files/load store --> video memory --> PCIe.
Two questions
(a) it's a consensus that the texture is directly loaded from the main memory for all previous generations of GPU. So if that's the case, for G80, is it still the same? We suppose that if the program is GPU-oriented( e.g. CUDA), then the texture can be moved from I/O to the video memory for faster executions later. But if that's the case, does G80 try to take the data not via CPU but through the PCIe, then the I/O via the south bridge of all the chipsets? We think this question is very important because even though the texture size is smaller than 768MB(8800GTX) or larger than 768MB(which will generate the issue of VM), this could be one issue which leads to the difference of performance.
(b) If there's no direct mapping between video memory and the main memory, what's the cost of interaction?
2. Related to Q.4 as well. Now we have AMD and Intel platforms(haven't done a huge research on the datapath on chipsets yet, but we will do it in the near future.). We all know that memory controllers and PCIe go through the northbridge of the Intel Platforms(nForce4, 570i, 590i, 680i, and perhaps P35), but the memory controllers are integrated in AMD processors, shown in
http://www.xbitlabs.com/articles/cpu...x_4.html#sect0
http://www.xbitlabs.com/articles/cpu...-e3-mem_2.html
And the below are for Intel chipsets:
http://www.pcper.com/article.php?type=expert&aid=320
http://www.extremetech.com/article2/...2134184,00.asp
How could we end up yielding the similar bandwidth and the performance between AMD and Intel chipsets.
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Thanks.