Well, Well, Xenon CPU and Cell the same??

Yeah.. Maybe their input was about stuff like that (from a Xenon related patent):

 

Interesting isn't it.

Guess which way Sony went with SPEs?

 

The number of registers doesn't affect the flop rating. Having a seperate set of registers per thread is nice, but having seperate threads of execution on the VMX unit itself would be nicer, and would affect the flop rating (but this doesn't seem to be the case, but i'm very open to surprise! ).

 

LOL! that's what I'd call turning knife in the back...

 

But....

... Devs doesn't sound anything like Jaws...

 

Dev-dev...dev-dev...dev-dev-dev-dev-dev-dev...

Easy. Fixed my sig too!

 

Right I only just noticed the lunacy of calling switch to SOA an "advance" too :?
Anyway personally I blame IBM for this, both Toshiba and Sony have a history of vector implementations that favored well, actually advanced SIMD ISAs. Some very recent history too.

 

Yes, I know what you mean. Let me clarify,

A 'core' would be a collection of execution units e.g. vector, integer etc., control logic, cache etc. that would be considered a complete 'whole' or 'processing unit' that could exist on it's own.

Sometimes cores are used to describe individual execution units, e.g. SIMD/vector/integer/PPE/SPE/VMX/FPU etc. but they cannot exist alone.

Also a chip or IC or die, doesn't necessarily equate to a 'core' as you can have multiple cores on a slab of silicon.

And your also confusing instructions per cycle with Flops per cycle.

Instructions per cycel != Flops per cycle

You issue instructions to execution units to get these Flops. The Xenon CPU can issue two instruction per cycle per core. Because it is 2-way SMT, it can issue these 2 instructions to 2 seperate threads simultaneosly per core. So for a tri-core CPU, you can issue 6 instructions to 6 seperate threads simultaneously per cycle to attain peak Flops per cycle. In the above example, these six threads would be 3 on the VMXs and 3 on the FPUs.

 

Yeah I know about the index limit, that's why I brought up the physical vs. logical. I was pretty much guessing along the lines of register windows (ala SPARC) or register banks (ala MIPS).

That's not much of a sauce... Increasing "pipes" won't do yu much good if your fetch and dispatch resources can't keep them fed (and VMX is an *extension* to PowerPC, thus you're typically constrained by the LSU resources of the CPU. All VMX/AltiVec implementations so far have been 2-issue so far with the main distictive traits revolving around execution unit layout and dispatch constraints...

 

Oh boo f'ing hoo... This is actually a good thing believe it or not...

 

So, i'm new in this board, just wanted to share my toughts.
I find that Pysix PPU very interesting, and i think that we may see it in next gen MS console.
The cpu from Xenon had 3 cores running at 3.5ghz(each?) but it seems that recent alpha kits(Gamespy) only have 2 cores, running at a lower speed - 3ghz - wich in my mind seems odd. They gave more power at the beggining and then took it away It doesnt make sense.
Now either they found that it was enough to compete with the ps3 or they found a better solution(at least from a performance standpoint).
I believe in the later one(call me a dreamer). And i dont believe in it just because.....
Epic games is currently working on an exclusive game for Xenon, to be published by MS, from this we(at least me) can be led to believe that in the console realm, the unreal tech will be specially optimized to work with Ms next gen console, in fact, MS has announced recently that they made a Deal with Epic to license their Unreal 3 tech for all their(Ms) games for next gen console.
Now, Unreal 3 is also the 1st and only right now to announce full support for the PPU, wich makes the PPU Xna supported.
I honestly believe(i'm a noob) that its all linked. Xenon - Epic - Xna - Unreal 3 tech - PPU.
If this happens, i think it will be very cool, because PPU will give a big performance boost to the system, as it will take off the physics work from the cpu just like the GPU takes off the graphics work from the cpu.

 

Umh..don't be shy..tell us why

 

Doesn't make sense? I think you're expecting something a little too solid at this point... There's a reason they're called "alpha kits"

 

Since when the Xenon tri-core PPC turned 3.5Ghz?

 

Maybe not the most on-topic question, but could the U3 engine be hardcoded in the Xenon?

 

It COULD be but it most likely will not. Optimized yes, hardcoded, probably not. I'm taking it that you are asking if all of the code in the U3 engine is completely Xenon specific. At first I thought you were asking if the engine could be hardcoded into the hardware :O.

 

It could very much be hardcoded . I don't see why not .

We know ati isn't going to drop the r500 tech. There will be a r600 part for the pc most likely early 06 based on this part so time spent getting down low for the r500 wont be wasted . I'm sure they will also want to use this engine for alot of games . So none of this will be wasted.

They will also write specificly for the cpu as who will liscense the engine for xenon games if it isn't ?

 

"Could" wasn't the right word for me to use. Ofcourse they can, it's a matter of "would" they hardcode the engine. Seeing as MS announced they will be using the engine for their games, it is likely.

 

GS: How long do you think it will take for developers to release games that will look and play significantly better on a PPU-enabled PC system?

TS: As with any new technology, there will be early games available that add hardware physics support into a mostly finished game design. That's the first stage, and it will give gamers the first hardware-accelerated physics support right away.

The later revolution will be in next-generation games designed with large-scale physics from the very beginning. PhysX will make that possible on the PC, while other innovations will make large-scale physics possible on next-generation game consoles. There is a great deal of synergy there, with Ageia's physics engine providing a great hardware-accelerated solution on PC (with a software physics fallback for reduced detail) and also addressing the needs of the future consoles.