Jawed
Legend
The substrate is bigger than G80's, so I'm thinking it's more than G80's 384-bit memory bus.How do you know that? Is this die shot showing it?
Jawed
The substrate is bigger than G80's, so I'm thinking it's more than G80's 384-bit memory bus.How do you know that? Is this die shot showing it?
So, GT200b is still 512-bit?
Jawed
It seems some people thought this might have GDDR5 and therefore less than 512-bits of memory bus.Why should an optical shrink it be not?
22x22 vs 22x21.5 for G80. It's big sure but it's not huge.Well, it`s still pretty huge die.
I dunno =)When will we see a GT206 die?
That's obvious, no? GT200b is supposedly exactly the same as G92b, G94b, G96b -- just a straight die-shrink without any changes to the architecture. GT206 should be the first GPU from NV with GDDR5 support.So, GT200b is still 512-bit?
22x22 vs 22x21.5 for G80. It's big sure but it's not huge.
I dunno =)
That's obvious, no? GT200b is supposedly exactly the same as G92b, G94b, G96b -- just a straight die-shrink without any changes to the architecture. GT206 should be the first GPU from NV with GDDR5 support.
Well i'm thinking that having 256-bit bus and not having GDDR5 support in the 2H08 would be a bit too much even for NVIDIA.GT206 with GDDR5 support? You have some clues of this or this is only your supposition?
AFAIR ATI never stated that RV870 will have DX11 support, only that they'll release DX11 GPUs in 2009.It`s even strange because ATI has claimed that they are going to release Rv870 with DX11 support around the same time.
So GT206 is going to have "only" 256-bit memory bus?
This means that there will be only 16 ROPs and it could be not enough with AA enabled. But i could be wrong of course.
GT206 will probably has only 4 64-bit ROPs. The number of ROPs however has nothing to do with their capabilities. Since GDDR5 provides nearly 2x increase in bandwidth per line these ROPs should have 2x more power and one GDDR5 ROP should be able to write 8 C / 32 Z per clock. Plus it may be smart (or not) to go with one clock 8 Z compare for MSAA and faster FP16 writing/blending. Using old ROPs with GDDR5 is pretty pointless.So GT206 is going to have "only" 256-bit memory bus? This means that there will be only 16 ROPs and it could be not enough with AA enabled. But i could be wrong of course.
GT206 will probably has only 4 64-bit ROPs. The number of ROPs however has nothing to do with their capabilities. Since GDDR5 provides nearly 2x increase in bandwidth per line these ROPs should have 2x more power and one GDDR5 ROP should be able to write 8 C / 32 Z per clock. Plus it may be smart (or not) to go with one clock 8 Z compare for MSAA and faster FP16 writing/blending. Using old ROPs with GDDR5 is pretty pointless.
You need to change the ROPs for double output of course. Otherwise you'll just waste GDDR5 bandwidth.The way you're phrased this makes it sound as though the bandwidth increase alone will somehow double the ROP capabilities, but I'm not completely sure that's what you're saying so I'll save my comments until you clarify.
You need to change the ROPs for double output of course. Otherwise you'll just waste GDDR5 bandwidth.