throw your ndas away

WOW Pascal, just gonna think out loud a bit ...

Assuming those 128 bit vertex shader engines do 1 MAC per cycle thats 350 MP/s.

I see the term anisotropic filtering wasnt fancy enough for Matrox :)

The anti-aliasing looks very cool, quality wise its exactly (!) the same as 16x multisampling as long as the fragment buffer doesnt overflow AFAICS. Although it wont AA intersections, so its more like a modified A-buffer approach.
 
Let's see what the Babelfish says...

- 80 million transistors
- 0.15 process
- chip and memory clock up to 350 MHZ
- 256 bit BUS
- 20 GB/s bandwidth
- 8x AGP with SBA and Fast Writes
- 4 pipelines with 4 texture units each
- Vertex Shader 2.0, four parallel shader units, some DX9 stuff supported
- PixelShader 1.3... 4 texture + 5 combination stages on each pipeline (?)
- possibility to combine the pipelines in pairs for 10 combination stages (?)
- EMBM and DOT3
- some sort of fixed T&L support with extended matrix blending and skinning or something
- 400 MHZ, 10bit RAMDAC and something about 10bit TV-Out thingy
- triple head (kinky!) support for surround gaming
- 16x "Fragment AA" only applied to boundry points of polygons or whatever (?)
- No clue what this means but there's an exclamation mark so I guess it's important: "To glypyu Of antialiasing.the technology of apparatus boundary smoothing and gamma- correction of types (!)"
- N-Patches with adaptive tesselation (?)
- displacement mapping
- DX8/OpenGL 1.3 and some DX9 Features

------

Ok, this kinda worries me....

From words of one of the engineers of the company Of matrokh:My made this chip in order to show all.we are as before capable of developing the foremost solution.Another worker answered less seriously:Just odds of fun..It is obvious that soon so expensive a solution will not be able to influence the repartition/ conversion of market, but to here improve renome of the company Of matrokh it is capable.Even if the number of sold maps/charts/cards on the base Of paryuelia-shchy2 does not exceed 10000.One only announcement of the chip of that containing the foremost (not having thus far analogs) technological solutions is capable to draw close attention to itself. Thus, in comparison with the foregoing generation of accelerators, the spacing strip of local video memory twice will increase.But speed is the not main horse of the products from Matrokh.To the surprise, the chip Of paryuelia-shchy2 is not equipped with any technologies of the savings of the spacing strip of memory.this fact is surprising.similar technologies are present in all last products from ATI and NVIDIA, but apparently Matrokh decided to accelerate and to reduce the cost of the development of the chip, which is for them faster symbol, than by the attempt to conquer market. The tests of engineering samples on the also very damp/raw drivers show only 20..30% advantage Of paryuelia-shchy2 over NVIDIA To geForche of 4 Tiya'00.Even under the condition of successful tyuninga of software, two-fold superiority will hardly become possible.One-and-a-half times.here is the upper limit.It is obvious that with the essential cost/value of maps/charts/cards on the base of the new GPU from Matrokh, to usual users has the sense to buy them for the quality and the unique possibilities, but not speed.From other side, Matrokh it cannot pretend to the success on the professional/occupational market without certified OpenGL of drivers (possibly, they they will appear together with the professional/occupational rule of maps/ charts/cards on the base Of paryuelia-shchy2 release/issue of which it is planned/glided).The map/chart/card is unjustifiably expensive for niche prosto of the amateurs of the qualitative of 2D..Thus, to the first period remain enthusiasts, poluprofessionaly, fanaty of stamp and we.specialists in videokartam: -).the possibility Of direchtKh 9.
 
I must say I found the following slide strange:
figure_7.jpg


  • Some more info:
  • All cards will have 256bit bus.
  • 256MB cards will start around $500, 128MB cards - $400.
  • All cards will be made by Matrox.

    Specks:
  • 80M ts
  • .15 um
  • clock up to 350MHz
  • 256 bit bus
  • 64/128/256MB RAM
  • 4 pipes
  • 4 TMUs/Pipe (Why???- Geeforcer)
  • Fillrate up to 1.4Gp/5.6Gt per second
  • PS 1.3; 4 texture and 5 combiner stages per pipe, ability to "unite pipelines in pares"
  • VS 2.0, 4 units
  • EMBM/DOT3
  • Fixed DX8 T&L with expended matrix blending and skinning capabilities
  • 10-bit per channel
  • 2x 400MHx, 10bit per channel RAMDACs
  • Full 10bit gamma correction table
  • DVD and HDTV - 10bit output
  • 2 Independent CRT outputs
  • Adaptive SS FSAA up to 16x, only affects polygon edges.
  • DX9 N-patches with adaptive tessellation
  • Displacement mapping
  • Glyph Antialiasing - edge smoothing and gamma correction for fonts
 
I hope this does not indicate curved surfaces in DX9 will be an extension of N-patches :( The hardware has to treat them as polynomial surfaces anyway, that should be exposed to the developer. We cant always keep dicking around with low poly modelling, and thats the only thing N-patches are good for, existing tools for high detail modelling with curved surfaces use the classic polynomial surfaces for good reason.
 
I could translate the whole article, but that would take too much time. However, if anyone wants any part of the article properly translated (as opposed to crappy machine translation), tell me and I will do it for you.
 
Lets see if I can grab the interesting bit (try reading in between the failing translations):

So, shortly will be anonsirovany 64, 128 and 256 MB of a card on base Parhelia-512, high card in bar will cost about 500 $, for card about 128 MB of memory you pay already about 400 $. All cards are supplied valuable 256 bit with the bus of memory - a difference only in speed of operation of memory and its(her) size. Cards on base Parhelia-512 will be âûïóñêàòücÿ only itself Matrox, according to representatives of the company experience of cooperation with Gigabyte was the big error.

Now IMHO I am slightly confused by the mentioning of DX9.0. The pixel Shader side seems to be 1.3 since only 4 textures are supported per pass, if they could do 2.0 (16 textures) they would have implemented 1.4 (6 textures). So I would say that dx9 pixel shaders are out of the question.

Not sure about Vertex Shaders either, have they implemented all the new jumps, loops and register counts correctly ? They do have the minimum spec for constant registers and their instruction cache is 512 entries which might allow them to driver hack/expand some loops/label things. Question thus is if they have the bool constants and int constants.

Personally I suspect the hardware to be VS1.1 + PS1.3 + DX9 NPatches+Displacement Mapping.

I am a bit confused by their 5 (10 though combining of pipes it seems)stage pixel shader thingy, can anyone guess what they mean with it ? Issue is PS1.1-1.3 allows from 4 to 8 arithmetic instructions so I kinda miss the link with 5.
 
Pixel Shader is indeed 1.3, while Vertex Shader is 2.0.

10 is in regard to combiner stages. There are 4 texture and 5 combiner stages per pipe.
 
I do not know much about ps, but is it possible for matrox to combine the 4 ps 1.3 shaders to one 2.0 shader, or am i totally wrong???
 
Interesting... From the comparison table:

Aniso-
Parhelia: 8, 16
GF4 Ti: 8, 16, 32
Radeon 8500: Rip-mapping
 
Just had a look at their FAA... it seems to be some kind of edge only, coverage mask technique. I am a bit confused by their mention of "fragment buffer". I wonder how big this fragement buffer is and what it contains. Things are easy if you assume one possible fragement always covering a full pixel behind it (you would just need to store 2 colors and a coverage value) however if you have multiple fragment cases for the same pixel it gets complicated, but I guess you could ignore those.

The picture with the dragon and their stats numbers are misleading, they show an edge detect image and numbers but reality is that they do this "per triangle edge" as indicated in the text and you have way more triangle edges than indicated in their dragon image. They make it sound like they only do extra work and processing on 3.2% of the pixels, that number is probably much higher in reality assuming they do this per triangle edge (both visible and hidden). Sounds like a marketing twist.

I also wonder if they need a post processing phase where they process the fragment buffer and frame buffer into the final result.

I also wonder what happens to triangle intersection edges. Say I have a black and white triangle intersecting (Z test) this would give an aliased edge, if they only process the triangle "edges" this "intersection edge" might not be AA unless they detect and flag these intersection edges as well.

I suspect they have the frame buffer and the fragment buffer. The frame buffer contains full pixels, the fragment buffer contains the color of the fragment and a coverage value (ranging from 1 to 15, if its 0 it means there is no fragment on top fo the full pixel already in the framebuffer). So if a pixel is a triangle edge pixel you write the color of that triangle edge pixel into the fragment buffer and include a coverage value, the framebuffer contains the old background color (can be the clear color or the color of a previous polygon). The Z value is updated with the edge Z value. If another polygon overwrites this edge you would need to overwrite the framebuffer and the edge info should be invalidated somehow (this seems to indicate that extra BW is still required but not as much as with other techniques - MS of FSAA uses say 4 samples so you write 4 colors to the buffers, this system only writes 2 colors and a small coverage value, so less BW is used). Tricky bit is if you have an edge and its covered by another edge, I guess in that case you can force an update of the framebuffer with the old edge info and then add the new edge info into the fragement buffer. Hmm... wait... what if I insert a different colored polygon at a later time behind an already written polygon, this might update the background color. Original info might be from a clear (black) with an edge (white poly ) but I then insert a blue polygon in front of the clear but behind the white triangle... I would want a blend between blue (tri) and white (tri) and not between black (clear) and white (tri), how do you know you need to update the framebuffer (background) color. Hmm guess you need 2 Z-values as well, one for the background fragment and one for the edge fragment.

Definitely seems to have a BW advantge over other techniques :

MSAA = upsampled frame buffer and Z buffer = upsampled with the number of samples = for example 4 samples means 4 times the color and 4 times the depth buffer needs to be stored = say 32 bit Z and color = 32*4+32*4= 256 bits per pixel

Matrox FAA = only 2 buffers, background fragment buffer and edge fragment buffer, both need color and Z info and a special coverage value. = 2*(32+32)+4 bits (coverage mask value) = 132 bits per pixel

Nice saving at first look... also the FSAA MSAA techniques also require a normal size buffer (so you need one set of upsampled buffers and then multiple normal resolutions buffers that you combine into), this technique only needs a normal resolution buffers set (dual or tripple buffering) and a fragment buffer. You process the fragment buffer into the background fragement buffer in a post process phase.

Note its late so possibly I am missing some bits and bops about this technique, might even be wrong :)
 
Well , i've waited long enough , i'll buy it as soon as it comes out , and 2 other monitors

from what they said , seems they'll demo a few games for the "surround gaming" at E3

what i want to know is , can it run Doom 3 in surround gaming
(1600x3600) with FAA16x all MAXED out ?

who knows, maybe JC ( no , not jesus christ ) will show us at E3
 
muted said:
what i want to know is , can it run Doom 3 in surround gaming
(1600x3600) with FAA16x all MAXED out ?

Ugh, as good as P512 looks on paper, lets not overestimate it.
 
If they can ship that within a couple of months Ill have to admit it will be far more than I ever expected.

Hell who would think Matrox would be the very first to implement a smart anti-aliasing method!!! (since the Warp5 anyway, but that doesnt count) My prayers answered by the least likely source, have not been so pleasently surprised since 3dfx bought Gigapixel ... hope this doesnt work out like that though :)
 
Finally, something that's fun and easy to get excited about. The rumors surrounding Matrox and other companies never got me interested in the least. This, on the otherhand, is finally getting my interest.

Regardless of the leak, I still can't wait until the 14th.
 
Yup, this looks nice. :) Can't wait to see their antialiasing put to the test.
From an architectural standpoint the new chip from 3D-labs was perhaps even more intrigueing though.

Interesting times, indeed.

Entropy
 
Please, just look to the AAed 3dmark chase picture.
To me it seems the hill on the right is completely Aed.
Looking closer to it I can spot a kind of weird black edge.

ciao,
Marco
 
Mfa:
WOW Pascal, just gonna think out loud a bit ...
Yeah, very exciting time.

- Fragment FSAA
- Displacement mapping
- Lots of bandwith
- high quality 3D (40bits, better accuracy, etc...)
- Lots of vertex and pixel shader
- The price is not absurd (128MB $400)
- Very nice frequency response filter
- 10Bit DAC (including HDTV)
- on sale soon

Really powerfull. I dont care about DX9 for now.
Kudos to Matrox.

What can we expect now? Maybe a 256bits ddr PowerVR and a $150 NV30 for XMAS.
 
Dont' bash me..but am I the only one that think this is not enough?
I have the feeling R300 and NV30 will eat Parhelia alive, without being as much expensive, IMHO. (no prof, just a feeling :) )

ciao,
Marco
 
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