version said:devkit has 2 cells ,SPEs compute intersection , PPE shading
Hmmmmm...?
PPE does what kind of shading? Vertex, pixel? "SPEs computer intersection"..? Sorry if these are dumb questions..
version said:devkit has 2 cells ,SPEs compute intersection , PPE shading
Titanio said:version said:devkit has 2 cells ,SPEs compute intersection , PPE shading
Hmmmmm...?
PPE does what kind of shading? Vertex, pixel? "SPEs computer intersection"..? Sorry if these are dumb questions..
version said:Titanio said:version said:devkit has 2 cells ,SPEs compute intersection , PPE shading
Hmmmmm...?
PPE does what kind of shading? Vertex, pixel? "SPEs computer intersection"..? Sorry if these are dumb questions..
raytracing algorithm , ppe texturing and shading, spe ray-triangle intersection
london-boy said:Why would the CPU handle texturing?
A SPE can direct read from main ram.version said:texture data is in main ram, spe cannot direct read 1-2 texel, cpu can
version said:london-boy said:Why would the CPU handle texturing?
texture data is in main ram, spe cannot direct read 1-2 texel, cpu can
nAo said:A SPE can direct read from main ram.version said:texture data is in main ram, spe cannot direct read 1-2 texel, cpu can
Latency won't be any better for CPU eitherversion said:yeah just lateny about 1000 cycle
Fafalada said:I would like to have eDram at least for renderbuffers like Xenon, I don't like the idea of the fixed cost effects having bizarre random speeds because of nasty bandwith contentions.
Shifty Geezer said:Now somewhere on this forum I rememeber seeing a slide I think. Whatever it was, it showed a Cell processor with 25 Gb/s on one side and 75 Gb/s on the FlexIO shared between GPU and other 'stuff'.
Dunno where. Dunno the source. Dunno nuffink, really! But that info certainly appeared round these parts somewhere...
Npl said:Shifty Geezer said:Now somewhere on this forum I rememeber seeing a slide I think. Whatever it was, it showed a Cell processor with 25 Gb/s on one side and 75 Gb/s on the FlexIO shared between GPU and other 'stuff'.
Dunno where. Dunno the source. Dunno nuffink, really! But that info certainly appeared round these parts somewhere...
Thats correct. though the FleXIO is divided into a cohent and noncoherent link, dunno what to make of it yet. Think i read that the coherent would be used for connecting to other Cells and the noncoherent could be used for IO.
My best bet is the GPU having a own set of 30-50GB/s Ram (DDR, GDDR, XDRam, whatever). Think of Chip- and FastRam on the Amiga Would be stupid IMHO to pull textures from XDRRam through Cell through Cell/GPU-Link into small GPU-eDRam.