RV350 Die size clue?

[demalion]

So different process sizes at the same fab is guaranteed to be similar in the general layout characteristics? I had thought that there might be some level of "reinvention" as a new process was established, and that this, in combination with the other factors we've mentioned now, might be some information you might be familiar with...

As it stands, I'm presuming your answer means the information you are familiar with is that there was no significant level of reinvention for TSMC from 0.15 to 0.13, or that there is some technical/cost prohibitive reason this would not have changed much.

 

[Pete]

Russ, are you saying the actual chip may be smaller than its physical housing (substrate), so Dave's backside analysis may not be accurate? Unless the R300/350 chip is a very rectangular shape in a square substrate, comparing the pics still gives us a very general idea, no? ATM, RV350 looks miniscule compared to R300/350.

PSarge, if the chip is embedded in a larger substrate (the one with the model mumbers printed on it, similar to memory chips, right?), how would viewing it right-side up (under the HSF) show us a more accurate size? Judging by these Digit-Life 9500 Pro pics, the backside "space" does seem to correspond to the substrate/chip size. I used the heatsink holes as a reference (empty from the front, filled from the back--so a bit harder to see).

 

[RussSchultz]

Demalion: I don't think you can say "guaranteed", but as a rule of thumb, everything shrinks according to the quoted process size (.13, .15, .18, etc).

Pete:
For flipchip BGA, the actual die is layed on top of the substrate top side down. The substrate in that picture is the entire little PCB daughter card that the actual chip lies on (which is then attached to the card's PCB). In that picture its ringed with a white square which I presume is a grommet or gasket to keep the heat sink level. The silver/metallic rectangle in the middle (where the ATI logo is printed) is the bottom of the actual chip itself. While in this case it corresponds roughly to the keep out area on the back, it doesn't have to (and it looks as if the chip is a mm larger in each direction than the keep out area)

 

[Tahir2]

I thought the orifice comment was funny

 

[Dave Baumann]

The silver/metallic rectangle in the middle (where the ATI logo is printed) is the bottom of the actual chip itself. While in this case it corresponds roughly to the keep out area on the back, it doesn't have to (and it looks as if the chip is a mm larger in each direction than the keep out area)

Wrong way around.

I've just done a first for me by removing an HSF. The R350 chip is 14mmx14mm (making the R350 chip 196mm2), whereas the chips on the underside of the card are outside of a 15mmx15mm area.

 

[RussSchultz]

Its tough to tell when you're looking at two scanned images.

Oh, plus I was looking at the 9500 pro in the image on that site. You've got a R350 in front of you.

 

[rwolf]

Wow, with a core as small as the RV350 ATI is going to clean house if their yields are good. Think how many of those suckers they can get out of a wafer.

 

[Simon F]

Wow, with a core as small as the RV350 ATI is going to clean house if their yields are good. Think how many of those suckers they can get out of a wafer.

Gosh, I wouldn't think that 14x14 was 'small'.

[EDIT] Oops, Dave's pointed out that you had RV350. Has anyone said the size of that chip?[/EDIT]

 

[Dave Baumann]

Simon, the 14x14 is for R350, not RV350.

 

[Simon F]

Simon, the 14x14 is for R350, not RV350.

Sorry, suffering from "V" blindness!

 

[RussSchultz]

Well, would anybody like to share what the rV350 die size estimates are?

 

[Mariner]

Oooh, about so large.

(frantically waving arms backwards and forwards)

A question for those in the know: Is it possible for chip A to have more transistors than chip B yet still have a smaller die size (assuming both are produced on the same process) or is die size entirely proportional to the number of transistors? In other words, is it possible to 'lay-out' the chip more efficiently to reduce die size?

 

[arjan de lumens]

It is indeed possible for chip A to have more transistors than chip B, yet have a smaller die size. Some factors that affect the transistor count/die size ratio (other than just transistor dimensions) are:

• Presence of large SRAMs (and even more so DRAMs) will increase the ratio.
• Presence of large register files with many ports will decrease the ratio.
• Large numbers of wide buses/datapaths imply more interconnect, implying reduced ratio if the interconnect gets too crowded.
• Number of metal layers. More layers normally increases the ratio, as does copper interconnect.

 

[Mariner]

Ah - thanks for the info.

It really will be interesting to see how the die size compares between the RV350 and NV31/34 (bearing in mind what Dave has said), although it really is all but irrelevant as performance is what counts.

I'm intending to buy a new mid-range card this summer. I don't think I'll get NV31 as the AA quality isn't good enough so I expect it will be RV350 unless, of course, PVR finally get a DX9 part out!

 

[RussSchultz]

It really will be interesting to see how the die size compares between the RV350 and NV31/34 (bearing in mind what Dave has said), although it really is all but irrelevant as performance is what counts.

While to you and I performance is whats interesting, when talking about "die size", the only really relavant information is how much it costs.

A bigger die may cost less because its in a different process, uses less layers, cheaper packaging, etc. Or it may cost more.

All this information is just "indictators". THe only people who really know are the bean counters at ATI or NVIDIA.

 

[Mulciber]

I dont really think looking at the bottom of the PCB will give reliable estimates for the size of an asic. Couldn't the balls being routed from the middle of the chip end up being on a lower layer of the board than pins from the outside.

Looking at the backside of the QuadroFX and assuming that the resistors are the outter bound for the chip, it would appear that the 125M transistor nv30 is a lot smaller than I expected.

Someone should go around ripping the IHS off the chips and measuring all their sizes for us. At least intel and AMD tell us roughly what the size is

 

[Mulciber]

It really will be interesting to see how the die size compares between the RV350 and NV31/34 (bearing in mind what Dave has said), although it really is all but irrelevant as performance is what counts.

While to you and I performance is whats interesting, when talking about "die size", the only really relavant information is how much it costs.

A bigger die may cost less because its in a different process, uses less layers, cheaper packaging, etc. Or it may cost more.

All this information is just "indictators". THe only people who really know are the bean counters at ATI or NVIDIA.

Right, didn't AMD move from a 7 layer process to a 9 layer process for the Thuroughbred-B chip? IIRC adding more layers trimmed die size, but the actual cost per chip was more because of the added layers. Does that sound right?

 

[Dave Baumann]

I dont really think looking at the bottom of the PCB will give reliable estimates for the size of an asic.

It doesn't necessarily hold true with all boards, I'm saying you can see a pattern with ATI's recent boards.

 

[PSarge]

PSarge, if the chip is embedded in a larger substrate (the one with the model mumbers printed on it, similar to memory chips, right?)

Flip-chip packaging, like Radeons & Athlons place the die, circuit-side-down (hence the name), on a mini-pcb called a "substrate". Because the circuit side is not exposed no further covering is required and the die is left with it's arse in the air. The heatsink then is attatched to this directly.

Memory chips, Geforces, and most other things, normally come in packages where the die is face up, bond wires connect the die to the substrate, and the whole thing is enclosed in ceramic. In those cases you can't see the die. This style of packaging is normally cheaper, but it's more difficult to get heat away from the die.

 

[MrB]

to help in B3D's quest to find the die size I've found out that the M10 has 60 million transistors.