You know we're not supposed to talk about the midgets. You shouldn't even have mentioned the midgets.
I am very sorry. I made it up, as a terrible joke. You seemed so enthusiastic, I was unable to resist the temptation to take advantage of that. I am bad, and I feel bad.What is midgets!!!
The eDRAM is architected so that the graphics hardware that interacts with it has basically perfect access. The bandwidth numbers thus exactly reflect what the hardware can use. Render output at peak memory use has equal read and write at peak memory utilization (read color and depth, and write color and depth, every cycle), while texture mapping just reads textures. If read and write is the same with render output, and texture mapping only reads, you wind up with more read than write.Guys, there still no answer on question: how GS can read from EDRAM more than write to it? Please someone.
Ok, I understand what it works, just can't completely understand how. It's like you have bottle 1 littere and to tubes, one tube fills bottle and can fill one littre, other tube empties bottle and can get out 1,5 littre. Here situation is the same. Regular RAM warks different.The eDRAM is architected so that the graphics hardware that interacts with it has basically perfect access. The bandwidth numbers thus exactly reflect what the hardware can use. Render output at peak memory use has equal read and write at peak memory utilization (read color and depth, and write color and depth, every cycle), while texture mapping just reads textures. If read and write is the same with render output, and texture mapping only reads, you wind up with more read than write.
Oh I see now. OK! Great! Thank you.They're rates, not capacities. You can transfer 25 MB into eDRAM in whatever time, and output 20 MB in the same time, but that doens't mean leaving behind 5MB.
I know basics. Like if reguar RAM have 6,4 Gb/s. Then 3,2 Gb/s goes in and 3,2 Gb/s goes out. That's simple. Here is something different. Of course all this bandwith can't be used, as you said. But in theory it have 48 Gb/s. But in real world then it not even close, if you can't if memory can't read as many as it can write. Then regular RAM with the same read/write rate is a lot more efficient than EDRAM in PS2 because regular RAM can get closer to theoretical bandwith. Correct me if there is mistakes.At this point your questions aren't for PS2 but computer science in general, and you should go read up on the basics of processors and how they work and what buses are etc. Then you should be able to make sense of PS2.
That's not simple, it's incorrect. A "bidirectional" bus isn't one where read and write is evenly split, it's one where the direction of the bus can be changed. That way, the full bandwidth of the bus can be devoted to writes in a write-heavy task, or reads in a read-heavy task.I know basics. Like if reguar RAM have 6,4 Gb/s. Then 3,2 Gb/s goes in and 3,2 Gb/s goes out. That's simple.
You want to say what in regular RAM you there is possible have read or write bandwidth more or less than half? Like if bandwidth is 6,4 Gb/s there can be lets say 3,4 Gb/s write and 3 Gb/s read or 2,4 Gb/s write and 4 Gb/s read? And also all bandwidth for write or all bandwidth for read?That's not simple, it's incorrect. A "bidirectional" bus isn't one where read and write is evenly split, it's one where the direction of the bus can be changed. That way, the full bandwidth of the bus can be devoted to writes in a write-heavy task, or reads in a read-heavy task.
Yes. You can achieve 48 GBs total data transfer across eDRAM bus.I know basics. Like if reguar RAM have 6,4 Gb/s. Then 3,2 Gb/s goes in and 3,2 Gb/s goes out. That's simple. Here is something different. Of course all this bandwith can't be used, as you said. But in theory it have 48 Gb/s.
Rhetorical example - Read one 4 byte screen pixel, read one 2 byte texture texel, output one new 4 byte pixel made of the original screen pixel combined with the texel. You have data in the ratio of 3:2 read:write.But in real world then it not even close, if you can't if memory can't read as many as it can write.
That... that explains everything!!! That is what I wanted to know! So there is also some work done inside EDRAM? Right?Rhetorical example - Read one 4 byte screen pixel, read one 2 byte texture texel, output one new 4 byte pixel made of the original screen pixel combined with the texel. You have data in the ratio of 3:2 read:write.
I asked because on X360 it works different, because ROP blocks is inside EDRAM chip.New What do you mean by 'work done'? There's no processing in eDRAM. The data is read from eDRAM into GS processors, then output into eDRAM. So the 'work' is done in GS pipelines, but the graphics work is done throughout GS as a total unity with it using the eDRAM as working space.
But as I say, this is basic Computing. There's nothing special going on here.
The 360's ROPs are on the same chip as the eDRAM, but the eDRAM itself doesn't do processing.I asked because on X360 it works different, because ROP blocks is inside EDRAM chip.