Questions about PS2
- Thread starter Liandry
- Start date
I am very sorry. I made it up, as a terrible joke. You seemed so enthusiastic, I was unable to resist the temptation to take advantage of that. I am bad, and I feel bad.What is midgets!!!
I apologize.
The rest of my posts is truth though, to the best of my knowledge.
The eDRAM is architected so that the graphics hardware that interacts with it has basically perfect access. The bandwidth numbers thus exactly reflect what the hardware can use. Render output at peak memory use has equal read and write at peak memory utilization (read color and depth, and write color and depth, every cycle), while texture mapping just reads textures. If read and write is the same with render output, and texture mapping only reads, you wind up with more read than write.
Ok, I understand what it works, just can't completely understand how. It's like you have bottle 1 littere and to tubes, one tube fills bottle and can fill one littre, other tube empties bottle and can get out 1,5 littre. Here situation is the same. Regular RAM warks different.
They're rates, not capacities. You can transfer 25 MB into eDRAM in whatever time, and output 20 MB in the same time, but that doens't mean leaving behind 5MB. That output would be made of the 25 MBs you fed into the eDRAM which would then be overwritten next frame/pass/draw. There's zero intrinsic correlation between input and output RAM consumption. You can generate lots of output data without reading much at all, and read loads of data to produce very little output.
You also don't run the hardware to the limits of its specs at all times. These values are peak possibles, not general use. eg. See PS4's ROPS. The 32 ROPS in PS4 can't be kept active 100% of the time - there's just not enough bandwidth. That doesn't mean they're useless though. When you do need the ROPS, 32 ROPS can do the work in half the time of 16 ROPS. So if your rendering pipeline for 16ms for a frame requires 4ms to draw with 16 ROPS, on hardware with 16 ROPS you'd have 12 ms for everything before that. On hardware with 32 ROPS you can do the drawing in 2ms, giving 14 ms (16% more) for everything else.
You also don't run the hardware to the limits of its specs at all times. These values are peak possibles, not general use. eg. See PS4's ROPS. The 32 ROPS in PS4 can't be kept active 100% of the time - there's just not enough bandwidth. That doesn't mean they're useless though. When you do need the ROPS, 32 ROPS can do the work in half the time of 16 ROPS. So if your rendering pipeline for 16ms for a frame requires 4ms to draw with 16 ROPS, on hardware with 16 ROPS you'd have 12 ms for everything before that. On hardware with 32 ROPS you can do the drawing in 2ms, giving 14 ms (16% more) for everything else.
Oh I see now. OK! Great! Thank you.
Now I have nex question. If there is 2,4 Gb/s bandwith inside EE, how there can be 3,2 Gb/s bandwith to RDRAM?
And how there can be 3,2 Gb/s bantwith from RDRAM to CPU if there is only 2,4 Gb/s bandwith inside EE?
I found this. With read I marked what I asked about. 1024-bit in and 1024-bit + 512-bit out. If there is 1024-bit in and 1024-bit out then it means EDRAM is already empty. What it will send to GS throug 512-bit bus if EDRAM is
already empty? Shifty said 25 Mb into and 20 out. But here I see what it's possible 20 into and 25 out.
already empty? Shifty said 25 Mb into and 20 out. But here I see what it's possible 20 into and 25 out.
They're not buckets. You don't put stuff in and take the same amount out. You can put a tiny 16x16 bitmap in there and then draw it a hundred thousand times onto the framebuffer. 1024 bits of framebuffer can be read, 512 bits of texture can be read at the same time, and then that 512 bits of texsture can be drawn into 1024 bits to be output into the eDRAM.
At this point your questions aren't for PS2 but computer science in general, and you should go read up on the basics of processors and how they work and what buses are etc. Then you should be able to make sense of PS2.
At this point your questions aren't for PS2 but computer science in general, and you should go read up on the basics of processors and how they work and what buses are etc. Then you should be able to make sense of PS2.
I know basics.
Like if reguar RAM have 6,4 Gb/s. Then 3,2 Gb/s goes in and 3,2 Gb/s goes out. That's simple. Here is something different. Of course all this bandwith can't be used, as you said. But in theory it have 48 Gb/s. But in real world then it not even close, if you can't if memory can't read as many as it can write. Then regular RAM with the same read/write rate is a lot more efficient than EDRAM in PS2 because regular RAM can get closer to theoretical bandwith. Correct me if there is mistakes. That's not simple, it's incorrect. A "bidirectional" bus isn't one where read and write is evenly split, it's one where the direction of the bus can be changed. That way, the full bandwidth of the bus can be devoted to writes in a write-heavy task, or reads in a read-heavy task.I know basics.
You want to say what in regular RAM you there is possible have read or write bandwidth more or less than half? Like if bandwidth is 6,4 Gb/s there can be lets say 3,4 Gb/s write and 3 Gb/s read or 2,4 Gb/s write and 4 Gb/s read? And also all bandwidth for write or all bandwidth for read?
Yes. You can achieve 48 GBs total data transfer across eDRAM bus.I know basics.
Rhetorical example - Read one 4 byte screen pixel, read one 2 byte texture texel, output one new 4 byte pixel made of the original screen pixel combined with the texel. You have data in the ratio of 3:2 read:write.
That... that explains everything!!! That is what I wanted to know!
So there is also some work done inside EDRAM? Right?Now anyone can answer my previous questions about RDRAM and inside EE bandwidth?
What do you mean by 'work done'? There's no processing in eDRAM. The data is read from eDRAM into GS processors, then output into eDRAM. So the 'work' is done in GS pipelines, but the graphics work is done throughout GS as a total unity with it using the eDRAM as working space.
But as I say, this is basic Computing. There's nothing special going on here.
But as I say, this is basic Computing. There's nothing special going on here.
I asked because on X360 it works different, because ROP blocks is inside EDRAM chip.
The 360's ROPs are on the same chip as the eDRAM, but the eDRAM itself doesn't do processing.
Very roughly speaking:
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