I'd also assume that higher density chips would appear without needing a new standard to be released, much like all other memory types right now.
Predict: Next gen console tech (9th iteration and 10th iteration edition) [2014 - 2017]
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I'd also assume that higher density chips would appear without needing a new standard to be released, much like all other memory types right now.
D
Deleted member 13524
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You're probably talking about this:
It probably is possible to avoid the interposer, but for a high-performance SoC that consumes >75W it would be bad to get the stacks of memory in front of the cooler.
Which is the reason why there's an interposer in the first place.
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Deleted member 11852
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I guess once they solve the heat dissipation issue. The lowest level will dissipated heat into the level above and those two will dissipate heat into the top level.
On top of dissipation, stacking very high-power chips on top of each other brings up the question of where power delivery and communications will take place.
TSVs are very large relative to the features on most layers of a chip, and they disrupt the area around them significantly.
Significant reworking might be needed to make use of a density-optimized GPU layer that is now full of holes that besides their own large size can reduce the density of the silicon around them.
TSVs are very large relative to the features on most layers of a chip, and they disrupt the area around them significantly.
Significant reworking might be needed to make use of a density-optimized GPU layer that is now full of holes that besides their own large size can reduce the density of the silicon around them.
Hi,
I would like to know if in this video is this XB1's architectural design seen on the slide?
Thank you...
I would like to know if in this video is this XB1's architectural design seen on the slide?
Thank you...
Yes, but not exclusively. All the GPUs have 'copy engines' alongside GPU cores.
Thank you. I postcd this in the wrong place but could not delete.
No matter how I look at it HBM seems an expensive solution, I wish we could see a most cost efficient approach to both modern bandwidth and RAM amount requirement in an upcoming hypothetical system.
Intel and Micron work with "Xpoint Memory" looks extremely promising especially once you consider pairing that tech with off chip last level of cache. I could envision a system actually completely free of DRAM. The tiniest XPoint memory that has been made is 16GB, with 2 chips the memory requirements for a reasonable system could be met more than that actually 16GB is a lot of RAM... oops I mean memory. It shifts the lines, there are always recurrent talks about media optical vs flash or how to pass on HDD, I wonder to which extend such tech could change the paradigm wrt how data are streamed in modern system (PC and consoles).
If you consider greater capacity than 16GB (or more chips) you could keep a lot of data cached for a given game, or games, hot and ready to use. I wonder if it could alleviate the slow speed of optical player, accessing the data is going to be slow the first time but then it could be OK. You would still need storage for patches, download but the cost could be easily shifted to customers (optional HDD, SD cards, USB keys, etc.).
Intel and Micron work with "Xpoint Memory" looks extremely promising especially once you consider pairing that tech with off chip last level of cache. I could envision a system actually completely free of DRAM. The tiniest XPoint memory that has been made is 16GB, with 2 chips the memory requirements for a reasonable system could be met more than that actually 16GB is a lot of RAM... oops I mean memory. It shifts the lines, there are always recurrent talks about media optical vs flash or how to pass on HDD, I wonder to which extend such tech could change the paradigm wrt how data are streamed in modern system (PC and consoles).
If you consider greater capacity than 16GB (or more chips) you could keep a lot of data cached for a given game, or games, hot and ready to use. I wonder if it could alleviate the slow speed of optical player, accessing the data is going to be slow the first time but then it could be OK. You would still need storage for patches, download but the cost could be easily shifted to customers (optional HDD, SD cards, USB keys, etc.).
Samsung believes all graphics cards (mainstream, performance, enthusiast) will embrace HBM, only difference will be how high stacks of what density, and how many chips each segment will use.
Blazkowicz
Legend
Xpoint has limited writes, if you use it as the system RAM you may end doing doing millions of writes too quickly and killing it off.
One easy if expensive use in a consumer product would be to dump the system RAM content into it when hibernating.
In the datacenter, you have an elaborate memory/storage hierarchy where Xpoint naturally find its place.
Today you may have DRAM > Flash > 15k and 10k HDD (dying) > 7.2k HDD > tape drive (for those who still use them), soon to be DRAM > Xpoint > Flash > 7.2k HDD > tape drive.
Consumer hardware and software tend to think in terms of "main memory" and "mass storage". You do have hybrid hard drives, but they're presented to the system as a regular hard drive.
I believe a console is likely to use HBM and a big low end PCIe SSD, and nothing more.
One easy if expensive use in a consumer product would be to dump the system RAM content into it when hibernating.
In the datacenter, you have an elaborate memory/storage hierarchy where Xpoint naturally find its place.
Today you may have DRAM > Flash > 15k and 10k HDD (dying) > 7.2k HDD > tape drive (for those who still use them), soon to be DRAM > Xpoint > Flash > 7.2k HDD > tape drive.
Consumer hardware and software tend to think in terms of "main memory" and "mass storage". You do have hybrid hard drives, but they're presented to the system as a regular hard drive.
I believe a console is likely to use HBM and a big low end PCIe SSD, and nothing more.
Do we have any bandwidth numbers for xpoint? I'd imagine it's an order of magnitude or more less than HBM. I know for sure the latency is higher than DRAM, and thus presumably HBM. Based on those two things it would seem like a pretty bad fit for high performance graphics memory to me.
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Deleted member 11852
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Expensive yes but cheaper compared to the conventional alternatives. It's definitely not a solution for huge bandwidth problems, though. Our recent server architectures abstract RAM pools in each physical server so that the RAM pool is accessed by many physical buses operating in parallel with a dedicated controller managing coherency across not only the local buses but also to remote (networked) servers.
The current designs and future for stacked RAM will not translate to our hardware. Indeed packing more RAM into smaller discreet areas conflate the problem.
I read estimate that puts it around the same speed as slow DDR3, not sure if reliable though. It is sure slower than std DDR in anyway that is why I envision it as a solution for a system along with a Crystal Web type of solution /off die last level of cache.
It won't be a solution for high end GPU that is sure, but I speak of replacing RAM/main memory more of SOC and APUs.
I expect manufacturer to adopt HBM as they need something to feed customers with though it is quite a paradox to go to that expense when on the other end in lower end card Nvidia uses more and more 128 bit bus on its GPU
Oops I completely forgot about that constrain, they claim that Xpoint is more durable than flash but it may not be enough.
For consumer level use it should be fine. Anandtech are estimating around 5GB/s sustained for 5 years before it hit's it's write endurance limit. That's well above consumer level use.
http://anandtech.com/show/9470/inte...-1000x-higher-performance-endurance-than-nand
With NAND, you can move the writes around the block to spread wear evenly. With XPoint working as DRAM (not a drive as per Anand's estimate), you need data to be local as it's addressed directly (I assume, otherwise it wouldn't be as fast as it is). The same memory locations will be tapped every single frame. Every write of the backbuffer to the same memory location will count as a wear. With 10 million writes endurance, that's 166,666 seconds at 60 fps. 2777 minutes. That's 46 hours until you've burnt out your slice of backbuffer memory. Writing once to it per frame - multiple passes like transparency would shorten that even further!
Xpoint makes sense as a replacement for flash, but not DRAM (or other volatile RAM).
Xpoint makes sense as a replacement for flash, but not DRAM (or other volatile RAM).
Megadrive1988
Veteran
I've still been thinking about how much of an improvement the next generation of consoles from Sony & Microsoft might be for devs that are CPU bound on PS4/XBO with the Jaguar cores if PS5/NextXbox if they have Zen / Zen+ / Zen 2 / Zen whatever. So Zen coming next year is meant to be on par with Intel Sandy/Ivy Bridge. If that's true, would that already be a large improvement from Jaguar -- Especially since Jaguar is not even comparable to AMD's own desktop class cores ?
Also, even if we're talking about just 8 cores of the Zen family, that would still mean 16 threads, as well as much more respectable clockspeed. I just hope Sony and Microsoft wouldn't opt for whatever is going to be the successor to Jaguar/Puma, meaning a small, feeble core. I would understand if Nintendo went with Puma for NX (assuming at least one form of NX, the home console,, is X86, which is more likely to be in line with Xbox One/PS4, but I'd be disappointed if PS5/XB4 didn't use some version of Zen.
Also, even if we're talking about just 8 cores of the Zen family, that would still mean 16 threads, as well as much more respectable clockspeed. I just hope Sony and Microsoft wouldn't opt for whatever is going to be the successor to Jaguar/Puma, meaning a small, feeble core. I would understand if Nintendo went with Puma for NX (assuming at least one form of NX, the home console,, is X86, which is more likely to be in line with Xbox One/PS4, but I'd be disappointed if PS5/XB4 didn't use some version of Zen.
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