NVIDIA TSMC's 0.11 Micron Technology

[Pete]

Why did I just read something about nV saying low-K 130nm still doesn't yield well enough? How is ATi getting away with it on RV350, and how will nV compete in core clocks without low-K?

 

[{Sniping}Waste]

Why did I just read something about nV saying low-K 130nm still doesn't yield well enough? How is ATi getting away with it on RV350, and how will nV compete in core clocks without low-K?

Its all in the layout. Bad IC layout will give bad yields. Some IC layout teams use auto routing programs to connect all the transisters and will take up more die space, cause more hot spots on the die, lay down traces in a way that will cause problems in the proces in the fab that lower yields. Some companys like Micron have ppl that worked in the fabs in the IC layout because they know what can cause problems in proces. All IC layout is done by hand and non with auto routers. Right know, Micron on average hit 70% to 90% yield on the first run of silicon. Most of there fabs run at 95% yields now because of how the IC layout team works.

P.S
Micron though they got a deal by over biding on some Intel IC layout ppl that worked for Intel for years. Micron gave them a big cheek and a pay hike to move to Micron. All the work they did was horred and my friend and others had to work overtime to redo all of there work. There goes the fath about Intel being better then everyone else.

 

[KimB]

I seriously doubt that, Waste. If Micron has such high yields for initial runs, then it's because they have sophisticated debugging software, not because their layouts were done by hand.

It's just unfeasible for any group of people, no matter how numerous or how good, to lay out by hand a tens of millions of transistor IC without problems.

 

[{Sniping}Waste]

Im not joking about the Layout by hand. Micron realy does this in the IC layout. No auto routing is done. all traces are put in by a person and not a program. That is why there is high yields.

EDIT
Micron has started this with .11 micron for about a 2 years now and have started to move to .07 micron and have working silicon now at .07 micron.

 

[duncan36]

The reasonr for the slowness was that nVidia developed for the Black diamond Low-K process, not the ordinary 0.13 micron process.

When they were forced to switch to the ordinary process they were further delayed by TSMC revising its design libraries and rules for the process.

Yeah and it had nothing to do with them screwing up their 6x2 design and desperately having to end up with a 4x2 architecture, it was all TSMC's fault with low-k, which ATi magically got to work the first time.

 

[webmedic]

that last comment is so true. Same fab same process. For ati it works first time and for nvidia it takes months and is still messed up.


It must have been like nividia missing out on all the first draft picks and having to choose whatever was left over for thier engeneering staff.

 

[radar1200gs]

The reasonr for the slowness was that nVidia developed for the Black diamond Low-K process, not the ordinary 0.13 micron process.

When they were forced to switch to the ordinary process they were further delayed by TSMC revising its design libraries and rules for the process.

Ok, but are they gambling again this time around? Or is .11 mature enough?

Well, given that TSMC was insisting their 0.13 micron process was ready when NV30 was having fabbing troubles I'd say the 11 micron process should be mature enough about the time NV50 is ready for launch...

 

[webmedic]

well only if your nvidia. For some reason it seems to work for everybody else.

For nividia there is nothing like shooting your mouth off when there is absolute 100% proof they are not on the up and up. It's not the process thats not ready it's nvidia.

 

[KimB]

Im not joking about the Layout by hand. Micron realy does this in the IC layout. No auto routing is done. all traces are put in by a person and not a program. That is why there is high yields.

What you have described is just an impossibility. Transistor counts are quite simply too high today for any reasonably-sized group of people to sit down and lay out a chip in any reasonable amount of time, let alone have it work without bugs.

No, I can believe custom software designed by the engineers at Micron to handle routing, and to test the hardware before it goes into the final design.

I cannot believe that all routing is done manually. It's just vastly too complex a job.

 

[webmedic]

Chalnoth you are just wrong. I dont remember were I picked up this bit of info but ati did hand do allot of hte stuff in the r3xx cores. They had specific help from intel with it. It had to do with the court case ati won against intell. Then they did hte cross license deal nad ati got some nice percs in the deal.

 

[StealthHawk]

Granted, new gpus are much more complex than the pentium 4, but IIRC, the p4 had its layout done by hand (at least the major functional units and layout)....Not sure if intel kept on doing this for the prescott though.

"Done by hand" or tweaked by hand after automated tool creates rough layout?

 

[DemoCoder]

The fact that other people got something to work "first time" means nothing. Imagine if you start developing on DirectX9 beta and encounter lots of problems. Later, the final comes out + patch and a competitor develops a product with much less hassle. Superior design team, or differences in timing?

Perhaps NVidia just got caught as an early adopter, designing for a process that was still being debugged. That fact that ATI can make low-k work on their first try doesn't compare, because the situations were different.

I often develop with very early release stuff and pay the price for it later, while other people who follow on 6months to a year later have no where near the hassle.

 

[Dave Baumann]

Well, given that TSMC was insisting their 0.13 micron process was ready when NV30 was having fabbing troubles

Sorry, this is completely wrong. TSMC were warning their customers that there was considerable risks with going the route NVIDIA did at that point in time - they definitely told ATI this as that was one of the reasons ATI stuck with 130nm.

 

[Mariner]

as that was one of the reasons ATI stuck with 130nm.

Ahem. Typo?

 

[Dave Baumann]

Meh. Hangover.

 

[radar1200gs]

Well, given that TSMC was insisting their 0.13 micron process was ready when NV30 was having fabbing troubles

Sorry, this is completely wrong. TSMC were warning their customers that there was considerable risks with going the route NVIDIA did at that point in time - they definitely told ATI this as that was one of the reasons ATI stuck with 130nm.

A couole of months after the launch of NV30 nVidia & TSMC were to hold a joint press conference about the 0.13 micron process and some of the impacts it had on nVidia. TSMC never turned up to that conference...

It was reported at Digitimes and nVnews.net, probably elsewhere also.

 

[Joe DeFuria]

A couole of months after the launch of NV30 nVidia & TSMC were to hold a joint press conference about the 0.13 micron process and some of the impacts it had on nVidia. TSMC never turned up to that conference...

Why would TSMC go to a press conference to hear nVidia blame issues on them, particularly if they aren't true?

 

[Joe DeFuria]

The fact that other people got something to work "first time" means nothing.

No, it means that with respect to the given situation, the "other people" are either

1) More skilled

or

2) Better decision makers.

 

[Bouncing Zabaglione Bros.]

A couole of months after the launch of NV30 nVidia & TSMC were to hold a joint press conference about the 0.13 micron process and some of the impacts it had on nVidia. TSMC never turned up to that conference...

It was reported at Digitimes and nVnews.net, probably elsewhere also.

I heard that ATI were also invited to help explain why it was "impossible" to build an effective DX9 chip using the .15 process, but they failed to turn up too.

 

[radar1200gs]

I don't know if TSMC has an archive section or not, but I downloaded a .pdf document from them before NV30 launched describing to customers the benefits of their 0.13 micron processes. They certainly were not warning anybody not to use the processes in that document, in fact they were actively encouragiing its usage and touting the Black Diamond Low-K process.

I'll have to see if I archived it on cd-r