TSMC Unveils Details of 5nm CMOS Production Technology

Discussion in 'Graphics and Semiconductor Industry' started by A1xLLcqAgt0qc2RyMz0y, Feb 6, 2020.

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  1. A1xLLcqAgt0qc2RyMz0y

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    TSMC Unveils Details of 5nm CMOS Production Technology Platform Featuring EUV and High Mobility Channel FinFETs at IEDM2019

    https://semiwiki.com/semiconductor-manufacturers/tsmc/282339-tsmc-unveils-details-of-5nm-cmos-production-technology-platform-featuring-euv-and-high-mobility-channel-finfets-at-iedm2019

     
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  2. Entropy

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    I would have liked to see some kind of approximate number for the relative density of the HPC variation of the process. Not that we ever got one for 7nm.
    Oh well, I guess we would have to look at the finished products anyway.
     
  3. DavidGraham

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    They will be at disadvantage compared to Samsung, as Samsung is planning to transition to GAAFET/MBCFET on their 5nm node.
     
  4. chris1515

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    If Samsung have the same problem with yield than with 7nm, they will not be at a disadvantage. TSMC conservative strategy seems to work currently.
     
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  5. Bondrewd

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    SS 5nm is 7LPP extension lmao.
    It's 3GAE that gives you MCBFETs.
    Assuming it works.
     
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  6. pharma

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    TSMC expected to begin volume production of 5nm in April
    March 12, 2020

    https://www.kitguru.net/channel/christopher-nohall/tsmc-expected-to-begin-volume-production-of-5nm-in-april/
     
  7. pharma

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    Marvell talks about TSMC’s 5nm process
    August 25, 2020

    [​IMG]
    https://semiaccurate.com/2020/08/25/marvell-talks-about-tsmcs-5nm-process/
     
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