NVIDIA Maxwell Speculation Thread

Still on 28nm, with a few more architectural tweaks compared to GM107. I had posted some detailed info and there was a good discussion on this a few pages back, check it out.

Do you have a source for this? Maybe I missed it but I don't remember them saying this publicly. I remember they had complained about increasing per transistor costs of advanced processes in general.

True..but since 16nm is based on 20nm..it should be easier than doing a full node shrink.

 

http://www.extremetech.com/computin...y-with-tsmc-claims-22nm-essentially-worthless

 

Your answer always depends on your question. Did they ask about the big one, the little one or the medium one? Is 20nm SOC suitable for the big one - maybe. Is 20nm SOC suitable for the medium one - probably. Is 20nm suitable for the little one - absolutely.

Forget the idea that one generation (family) of GPUs will come out at about the same time, or in the same process.

 

If the GM204/6 is on 28nm I wonder how much of a performance jump with extra architectural tweaks or additions it would bring, I wonder if they can have a big jump that is somewhat close to die shrinks. I was expecting a 20nm GM204/6 this year but it depends on how well TSMC 20nm is doing right now or will be doing in a few months time.

You have insider sources?

Will it be more like a year after the GM204 is released similar to the GK110 & GK104 or will it be shorter? I wonder if Nvidia is going to go 20nm or 16nm FF for GM200 or just have it on 28nm.

 

What seems pretty certain is GM200 is in 2015.
Pessimistic interpretation would be GM204, 206 are paper launched in 2014 but you won't be able to get them till next Q1. Or at least GM204 would be decently available (yummy card with 4GB memory), GM206 barely available at all, high prices for both.

Lazy hypothesis is all GM20x are 20nm, and Pascal is too. I even wonder if Pascal is GM200.

If nvidia has a flexible memory controller that can do either HMC-like memory or GDDR5 (or GDDR6) then it would be reasonable to take the option of building GM200 with those controllers and the NVLinks, which would be disabled / not linked to anything. They could call the GPU something else when HMC and NVLinks are present / enabled.
Since it's a pet theory of mine, it should be wrong.

 

There has already been a discussion and you can find it somewhere in the past pages. Anyways, it is expected lower than the improvement with GM107.

 

Maybe, but they are not using HMC ... they are using HBM, which unlike HMC has wide IO.

An architecture designed to make efficient use of HBM will be radically different, you have an order of magnitude more channels to work with. You could glom all those channels into 4 ultra-wide ones so it would look a little like GDDR5, but that would be wasting potential.

 

That is the author's sensationalized title..Nvidia never said that. This is basically what I had mentioned in my post..Nvidia were complaining about the costs of the advanced processes in general.

If GM107 is anything to go by, GM204/6 should bring some big performance improvements, even though they're staying on the same process. Besides..die shrinks don't really mean what they used to anymore.The age of "free" die shrinks ended somewhere around 65/55nm. After that, performance and power improvements between nodes have not been as great as they historically were, and this is what led to the development of FINFET/Tri-Gate.

Yes, and they've proven to be right in the past so I have no reason to believe this isn't true.

Have not heard a definitive timeframe for GM200 yet but the gap should be less than that for GK104 to GK110. GM204/6 are targeted for release by Q4. From what I've been told, it is all on 28nm.

As stated above, if my information is correct then GM204/6 should be out by Q4. I have no idea about GM200 but I'd agree with you, it seems likely that it is a 2015 part.

I can't tell if you're joking but Maxwell and Pascal are two distinct families.

 

For me, his "sensational" title of the article proves to be a nowadays reality. So, I really don't understand your skepticism.

I guess it would work perfectly fine if they SKIP 20nm altogether and ever.

 

I'm guessing if all of the GM20x GPUs will be on 28nm then Nvidia won't be going on presumably TSMC's 16nmFF with Pascal (by then that process will been out for over a year) and then 10nm with Volta which would be i'd call it 'delaying' transition to processes and keep costs down but compensating with significant architectural improvements and advancements like 3D/stacked memory. Is this is what basically Nvidia and AMD is going to do?

 

That's not necessarily what has been reported post GTC. NVIDIA are saying that Pascal is using the same SMM structure as Maxwell with the "Volta" architectural change (that would inevitably spawn a series of products) pushed off the roadmap slide but still slated post Pascal. Given those statements and "Pascal" really being a vehicle to stacked memory Blazkowicz's comment is one reasonable potential interpretation of the information.

 

What reality are you referring to? The sensational title implies that NV has an issue with the process itself, whereas the main issue is that NV has a problem with the cost. They're not saying that the process is worthless like the title implies, they're saying that in terms of per transistor cost, it is essentially worthless to go to 20nm. And not just 20nm, it says NV has a problem with where 16 and 10nm costs are heading as well. This does not apply to just NV btw, process costs are going up across the board in the entire industry. They will have to deal with it, simple as that. But the author has chosen to take the whole thing out of context and say "NV claims 20nm is essentially worthless". I don't get how exactly I'm being skeptical here

That appears to be the case, and with Pascal shown as a 2016 part on the roadmap..it fits the 16nm process schedule as well.

Wont be or will be? Given the 2016 timing of Pascal on the roadmap, I don't see what other process it could be using apart from 16FF. Given that products on 16FF will probably be available only in H2'15 (Going by the 20nm track record so far), if NV releases a Pascal part in early 2016, the process will still be quite young at that point. A consumer GP107 class chip may not need 3D stacked memory or NV Link and could be out ahead of the rest of the family, maybe in late 2015 even.

From my understanding, compared to Maxwell, Pascal would have 3D memory, NV Link and Unified memory and is a completely different family. Even in the case of NI and SI, though they have less of a difference in features, I would still consider them a separate family. Either ways my point was that GM200 and GP200 are two separate chips.

 

They first had an exponential roadmap then they switched it to linear a year or so ago for some reason.

I've made a chart with my guesses for NVIDIA's upcoming GPUs, assuming all GM20x parts are on 28 nm:

Code:

Scenario #1: GM2xx on 28 nm. 

                   Fermi            Kepler                          Maxwell                         Pascal
                    2011            2012            2013            2014            2015            2016           
                   |       |       |       |       |       |       |       |       |       |       |       |       
Volume production  40 nm   |28 nm                                  |20 nm  |16 FF
                           ·–––––––––––––––·                       ·–––––––·–––––––––––––––—–––––––·
    500-600 mm^2:  GF110 16* SM            |GK110 15 SMX    GK180 15 SMX            GM200 ~25 SMM  ·
                   1.3/0.7 TF              |3.9/1.3 TF      4.3/1.4 TF              ~6.4/~1.6? TF  ·
                                   ·–––––––·                                                       ·
    300-400 mm^2:   GF114 8 SM     |GK104 8 SMX                             GM204 ~15 SMM          ·
                    1.2 TF         |3.1 TF          3.2 TF                  ~4.0 TF                ·
                                   ·–––––––·                                               ·–––––––·
    200–275 mm^2:   GF116 4 SM             |GK106 5 SMX                     GM206 ~10 SMM  |GM214 ~15 SMM
                    0.69 TF                |1.8 TF                          ~2.7 TF        |~4.5 TF
                                   ·—––––––·                                               ·
    100–150 mm^2:   GF108 2 SM     |GK107 2 SMX                     GM107 5 SMM            
                    0.31 TF        |0.81 TF                         1.3 TF
                                   ·                                                        
        ~75 mm^2:                  |GF117           GK208 2 SMX     GM108 ~3 SMM           

All codenames listed have shown up in rumors and reports.

GM206 and GM204 I think will be around 2x and 3x a GM107 respectively, at least in terms of the number of SMMs. Thus the ALU increases over the respective GK10x chips are going to be less as the chip gets bigger. While that's not necessarily a bad thing, it could mean that we won't see a huge performance jump over GK104 (perf/W on the other hand…). Another possibility is a 20 SMM GM204 with a die size around 450-500 mm^2 and notably higher performance than the 780 Ti. If that happens then the GM204 could be close enough to the GM200 (except compute and DP) to make me think that we won't see GM200 in the non-TITAN consumer space.

I think GM200, as I speculated earlier, will be released with all SMMs enabled and with high clocks. As for the DP ratios, the number I have on the chart assumes 1:4 DP rate—if 1:2 is possible then we could see nearly double the DP possibly at the expense of some SP CCs.

GM214, if it exists, could be some sort of 16 FF shrink of GM204, but there seems to be a tight interval as to where to put it so that it doesn't come too close to GM204 and GM206 and doesn't go too far into Pascal territory. As for Maxwell vs. Pascal, I think there will be chips codenamed GPxxx unless they change the codenaming system.

 

All this Die Process talk really is influencing my idea for a research Dissertation for my final (undergraduate) year of University.

Sorry I mean not until Pascal, didn't proof read it . But yeah I can see Nvidia going 16nm FF in 2016 with Pascal (maybe not take as long as performance range from GK104 to GM204) with something like a summer release for say a GP104. For what is going to likely be a 28nm GPU, GM204 is taking a while so I was wondering if the second generation Maxwell was going to be 20nm but then they switched to 28nm due to too much dimished returns or/and problems and had to go back change them.

Though I wonder what the Bus Width is going to be for the GM20x GPUs, will they decide to go 512 bit bus for GM200 and 384 bit bus for GM204 or will they still do 384 and 256 similar to right now? I'd like a GM200 with a 512 Bit bus but not sure if they'll attempt that at 28nm as customers who want GM200 GPUs would like it to be a big step up with Double Precision over the GK110.

 

There's no GK180, there's GK110 and "full respin" of it called GK110B

 

At least CUDA.dll knows GK180 and GK210:
http://forum.beyond3d.com/showpost.php?p=1827668&postcount=944

 

Dunno what's up with that, but only place GK180 (to my knowledge) was even rumored to be was K40 and NV lists K40's GPU as GK110B themselves

 

I don't believe so. I think going to such large buses is a waste of power and die area.

With the bigger Maxwells, I think the IO width and power consumption will stay the same, but we're going to reap the benefits of the improved performance/watt.

 

I have no problem with that

 

NVIDIA's Quadro Product Manager mentions that the K6000 has a GK180. It might be that GK180 = GK110B.