NVIDIA GT200 Rumours & Speculation Thread

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Well if G92b really is just a higher clocked 55nm version of G92 and Nvidia thinks it's fast enough to compete with RV770 then we are in for a seriously boring summer if they turn out to be right.

They may be "competitive" in the sense that 3870 competes with 8800 GT. The clear winner there is obviously the 8800 GT though. ATi may once again retake the performance crown until G100.
 
There are a lot of low hanging fruits in G92, so maybe they decided to exploit some of those. However, my expectation is indeed that this is a straight shrink - in which case, if NV thinks it will be competitive with RV770, they are simply mistaken AFAIK.
 
There are a lot of low hanging fruits in G92, so maybe they decided to exploit some of those. However, my expectation is indeed that this is a straight shrink - in which case, if NV thinks it will be competitive with RV770, they are simply mistaken AFAIK.

Are? Don't you mean were?

Unless you're talking about upping the ROP & memory interface by 50% each and bringing G92b back up to par with G80 in worst-case scenarios.
 
There are a lot of low hanging fruits in G92, so maybe they decided to exploit some of those. However, my expectation is indeed that this is a straight shrink - in which case, if NV thinks it will be competitive with RV770, they are simply mistaken AFAIK.

A 55nm "G92b" with a similar die area to the 65nm G94 would certainly be awkward.

But i have my doubts it will be a "straight" die shrink, a full press event just for that... i don't know, it doesn't sound right. ;)
 
I don't know what the press event is about and I'm not under NDA, but if it's in August that couldn't be for G92b... Also, presumably there will be a 55nm shrink of G94 too.

wrt G92, I meant that they are mistaken if they think it can compete with RV770. However I agree that they were also mistaken to make some of the design choices in G92. Without improving some of the 'fixed' bottlenecks though (triangle setup & friends), I'm not sure more ROPs make that much sense except to increase bandwidth and video memory.

Certainly a chip with twice the triangle setup rate, 48 TMUs and 192 SPs, plus a 320-bit+ memory interface would have been much more interesting. You can't always get what you want though, and we'll see how they'll handle the rest of the family for GT2xx... :)
 
Might this be a case where Nvidia has sort of shot themselves in the foot by tying memory channels (bandwidth) to ROP count?

And thus to design a a lower tranny chip to compete with Rv670 on price they had to sacrifice high resolution performance by not only chopping ROPs but also in the process bandwidth?

I've always thought that was a rather strange design decision.

Regards,
SB
 
Might this be a case where Nvidia has sort of shot themselves in the foot by tying memory channels (bandwidth) to ROP count?

And thus to design a a lower tranny chip to compete with Rv670 on price they had to sacrifice high resolution performance by not only chopping ROPs but also in the process bandwidth?

I've always thought that was a rather strange design decision.
I think it's a good way to go. ROPs will consume the majority of bandwidth, so having such a direct relationship makes sense.

I honestly think it's early days for this configuration. It'll look much better with GDDR5, but it's already working well.

G94 happily competes with RV670, I don't see where the problem is. NVidia achieved a 250M transistor saving by chopping out 64 SPs and 32 TMUs.

Jawed
 
Just a random idea: increase the number of ALUs per Interpolation/SFU unit. The current ratio is very high and it seems simpler to me (and more efficient) to change that rather than try to expose the MUL better...

You know I still can't reconcile the scheduling of the SFU unit and the MUL co-issue. Based on one of Nvidia's patents System and method for processing thread groups in a SIMD architecture it looks like the SFU block is scheduled independently from the MAD block and they are not necessarily working in tandem on the same batch.

So if they are independent how is the MUL co-issue even theoretically possible?
 
I think it's a good way to go. ROPs will consume the majority of bandwidth, so having such a direct relationship makes sense.

I honestly think it's early days for this configuration. It'll look much better with GDDR5, but it's already working well.

G94 happily competes with RV670, I don't see where the problem is. NVidia achieved a 250M transistor saving by chopping out 64 SPs and 32 TMUs.

Jawed

Aye but the smattering of reviews I've seen tend to show that in memory heavy applications and in high resolutions G92 and G94 tend to fall off much more sharply than Rv670.

For example a 256 meg 9600 GT hits a wall...and hard with high resolution and high memory use. Whereas a 256 meg 3850 continues with a predictable drop as resolution/memory requirements increase.

Or is it just that the G8x/9x architectures require more memory than R(v)6xx does?

Regards,
SB
 
At the R600-Launch AMD was making a point about their (again) all new ring-bus MC being able to support a dedicated 'stop' for virtualized VRAM via PCI-Express. IIRC they were also stating that traditionally (dunno if that was only the case with Radeons), rendering was stalled as soon as virtualized VRAM ressources were being accessed via PCIe. Again - i don't know if that was the case only during command/adressing or during the whole data transfer.

Maybe they really had a point there - especially regarding the more linear downward scaling of Radeons when being more and more limited by VRAM size?
 
However, my expectation is indeed that this is a straight shrink - in which case, if NV thinks it will be competitive with RV770, they are simply mistaken AFAIK.
How much faster will be RV770 than RV670 in your opinion (on average in %)? =)
 
How much faster will be RV770 than RV670 in your opinion (on average in %)? =)

Fast enough to be competitive... 5% faster than the competitor's similar offering? Perhaps faster given the new architecture and the market this summer, but we'll see... Nvidia's GT200 looks pretty good too.

Hard to tell with lack of testing through drivers too...
 
Aye but the smattering of reviews I've seen tend to show that in memory heavy applications and in high resolutions G92 and G94 tend to fall off much more sharply than Rv670.

For example a 256 meg 9600 GT hits a wall...and hard with high resolution and high memory use. Whereas a 256 meg 3850 continues with a predictable drop as resolution/memory requirements increase.

Or is it just that the G8x/9x architectures require more memory than R(v)6xx does?

Regards,
SB

i think that was caused by the LOD arithmetic of NVIDIA would bring more memory fragment than AMD .
 
Fast enough to be competitive... 5% faster than the competitor's similar offering? Perhaps faster given the new architecture and the market this summer, but we'll see...
You don't know what's going to be the offering of the competitor so i don't know where you're getting this 5% number.
I asked because if we're to believe that RV770 is RV770... and it is being done on the 55nm... and is using more or less the same R6x0 architecture... and R700 is made out two RV770s... then there are limits on how faster than RV670 it can be.
G92 is already hitting these limits (G92s in GX2 are slower then G92 in GTX) and if you go beyond them it will become more and more difficult to use the chip as a basis for dual-chip board. And that is exactly why i think that RV770 won't be significantly faster than G92b.

Nvidia's GT200 looks pretty good too.
We have ZERO firm info about GT200.
Even GT200 as a codename is wrong.
So it looks like a phantom right now.
And i do believe that GT200 (or G100 as i prefer to call it) is in a completely another league than RV770.
 
Aye but the smattering of reviews I've seen tend to show that in memory heavy applications and in high resolutions G92 and G94 tend to fall off much more sharply than Rv670.

For example a 256 meg 9600 GT hits a wall...and hard with high resolution and high memory use. Whereas a 256 meg 3850 continues with a predictable drop as resolution/memory requirements increase.


I dont know about that to much, I play DDO, DX9 game, at 1920x1080 on my 37" HDTV thru a HDMI connector and I get anywhere 15fps(worst case in the worst newest mod for the game when it comes to lag) all the way to 190fps with 4xAA, 16xAF and everything maxed out. Granted it is a DX9 game, The Twelve is the only area where the frame rates dip to 15fps and thats with caster spell effects numbering close to 10 or more on the screen at once, 11 other players and around 8 baddies on the screen aswell.
 
I know its from FUD, but its another twist in nVIDIA's code naming scheme! :LOL:

http://www.fudzilla.com/index.php?option=com_content&task=view&id=6647&Itemid=34

Still DDR3

Nvidia plans to release a new card in Q2 2008 codenamed D10U-30 and the new card will come up with 1024MB of DDR3 memory. This is the chip that comes before GT200, and GT200 should be out in Q3 or early Q4.

The board will have quite nasty heat dissipation, as we’ve learned that Nvidia warned its partners to expect approximately 225 to 250W dissipation from the card. This information leads us to believe that this is yet another dual chip card.

We still don’t know that much about it, but we have confirmed its existence. We wonder if it is 55nm G92 shrink behind this card.
 
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