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So is the GA102 only for the 4090 series?
4080 may be cheaper than expected.
AD102, and I find that to be very unlikely - unless they plan to use AD102 for workstation and server markets extensively. Wouldn't make much sense to have only one SKU on the chip with the most percentage of defects otherwise.So is the GA102 only for the 4090 series?
Product pricing rarely have anything to do with what chip a product is using.4080 may be cheaper than expected.
AD102, and I find that to be very unlikely - unless they plan to use AD102 for workstation and server markets extensively. Wouldn't make much sense to have only one SKU on the chip with the most percentage of defects otherwise.
Product pricing rarely have anything to do with what chip a product is using.
But again with the wattage though.
4080 on AD103 having a "similar TGP to GA102" means that it should be 320-350W. And then we're supposed to have a AD104 based 4070 which is 300W? So there's like 20W of difference between a 4070 and 4080 based on two different chips?
Also if we assume that 4070 will be above 3090 (some sources are saying that 4060 should be about on par with 3090) then it will be a rather small perf/watt gain (350->300) from going down to an N5 (N4?) process AND presumably dropping from G6X to G6.
Looks fishy as hell.
Also AD104 with a 192 bit bus and G6? I dunno, these looks off.
Significant improvement in clocks would make chips with same SM numbers a lot faster though which in turn would mean that such 4070 wouldn't be just above 3090 but would in fact beat it by some 50%. Which again seems fishy for a supposedy 192 bit G6 chip.AD104 is supposedly only 60 SMs. 300w on 5nm does seem high for that configuration unless Nvidia really screwed the pooch. Same for AD103. Doesn’t make sense for it to have the same number of SMs and less memory than the 3090 at the same
power on a much better process.
kopite7kimi has a pretty good track record of Nvidia leaks though so it might be true. Maybe Nvidia cranked clocks or there’s a lot more silicon in those chips than the SM count implies.
From they learned from Ampere, Nvidia maybe decided not to put the largest chip into the not-top-end SKUs. So AD103 for 4080 makes sense for me.AD102, and I find that to be very unlikely - unless they plan to use AD102 for workstation and server markets extensively. Wouldn't make much sense to have only one SKU on the chip with the most percentage of defects otherwise.
Kopite said GA102, not the specific SKU. So the TGP he points could be ~450W, of 3090 Ti.4080 on AD103 having a "similar TGP to GA102" means that it should be 320-350W.
I agree it's too narrow. Maybe AD104 is not aiming 3090 in 4K gaming. Let's wait and see how large L2$ helps.Also AD104 with a 192 bit bus and G6?
Or a 320W of 3080. Considering how pointless 3090Ti is from performance per watt scaling it makes even less sense to assume that he means 450W.Kopite said GA102, not the specific SKU. So the TGP he points could be ~450W, of 3090 Ti.
Significant improvement in clocks would make chips with same SM numbers a lot faster though which in turn would mean that such 4070 wouldn't be just above 3090 but would in fact beat it by some 50%. Which again seems fishy for a supposedy 192 bit G6 chip.
3070 is 220W while performing like 2080Ti which is 250W so there was some improvement at the very least.Right you would expect performance to be through the roof with these power numbers unless Lovelace is another Ampere situation where there was almost no improvement in perf/watt. That’s unlikely though.
Don't think only about die size but transistor count. 250mm2 on N4 has more transistors than 500mm2 on Samsung N8Why would nVidia use a <=250mm^2 Die and push it to 300W? That doesnt make any sense. And how would AMD be even able to compete when they have to use twice the size?
Nah, this does sound very logical for a bleeding edge process with very expensive wafers. The smaller a die can be the better for your margins here.Why make these dies as small as possible and clock them to the moon? That doesnt sound logical.
Excactly. Why make these dies as small as possible and clock them to the moon? That doesnt sound logical. At the same time Hopper is as big as possible and resonable clocked...
look at the TDP difference between GDDR6 RTX 3070 and GDDR6X RTX 3070 Ti
Exactly.Nah, this does sound very logical for a bleeding edge process with very expensive wafers. The smaller a die can be the better for your margins here.
Just my guess. AD103 has 40 % more SMs than AD104, 40 % more ROPs, 33 % more LLC and 33 % wider memory bus. Maybe it will be just 30 % larger, but the point is that AD103 is larger than AD104 and its clock won't be (likely) lower. Maybe it will be, but resulting performance gap between GA103 and GA102 would be huge. Anyway, with the impact of GDDR6X, I can't imagine how could AD103 / RTX 4080 consume just 50 watts (17 %) over AD104 / RTX 4070.I'm not sure where the "~40% bigger die" comes from though. Do we know die sizes for AD104/103/102 from somewhere?
Weirdly, I've noticed that the L2 cache is stated as 80MB for this card
Hence why it would be more probable for 4070 to not actually consume 300W and stick to 200-250W range instead. Would also make the "3090+20%" more plausible IMO at such wattage. Cause at 300W it should be closer to 3090+50% which seems rather high for a 4070 card, and with a 192 bit bus to boot.Anyway, with the impact of GDDR6X, I can't imagine how could AD103 / RTX 4080 consume just 50 watts (17 %) over AD104 / RTX 4070.
Nah, this does sound very logical for a bleeding edge process with very expensive wafers. The smaller a die can be the better for your margins here.
That's a different question. It's probably considerably cheaper to make all chips for one production line? But I wouldn't rule out them using Samsung again for some AD107 GPUs.Why use 4nm at all for <400mm^2 dies?