Sorry, I hate to start yet another thread on the subject, but I didnt want this information lost at the bottom of another thread. I also don't have a history of posting here, so you can decide yourself whether you think this is reliable or not. This information comes from a friend who works for a major OEM:
- NV30 Sampling in October
- NV30 Production in January
- Original sample date given early this year was August.
----------
My personal comments:
Scenario 1:
Lets suppose they had initial tapeout August 1st. That means silicon comes back mid-sept, they polish drivers, build some boards and ship samples a few weeks later. This means they have a high degree of confidence that there will be no major problems with the ASIC that cannot be addressed by software workarounds. I don't think this is realistic.
I expect that on a chip of this complexity, they will have at least one metal-only spin before sampling. (To address problems that cannot be worked around in software). In fact, they may even have a full layer spin prior to full production to work out yield issues and to correct any remaining problems not addressable by metal mask. This may push volume production into February.
Scenario 2:
They've already had silicon back, have gone through metal spins and don't have any remaining major errata. They need to do one final full-layer spin to correct yield issues and/or any remaining minor problems. (If it wasn't full layer, why would sampling wait til October?). Based on the above sampling and production dates, this almost seems more realistic. (100 days from final tapeout to volume production). It's possible that they couldn't have sampled earlier due to major issues with early silicon. This scenario makes sense if they indeed taped out as originally speculated (and noted by Jen Hsun) and thought they might have OEM samples in the August timeframe.
In either scenario, we'll see NV30 in January at the earliest.
- NV30 Sampling in October
- NV30 Production in January
- Original sample date given early this year was August.
----------
My personal comments:
Scenario 1:
Lets suppose they had initial tapeout August 1st. That means silicon comes back mid-sept, they polish drivers, build some boards and ship samples a few weeks later. This means they have a high degree of confidence that there will be no major problems with the ASIC that cannot be addressed by software workarounds. I don't think this is realistic.
I expect that on a chip of this complexity, they will have at least one metal-only spin before sampling. (To address problems that cannot be worked around in software). In fact, they may even have a full layer spin prior to full production to work out yield issues and to correct any remaining problems not addressable by metal mask. This may push volume production into February.
Scenario 2:
They've already had silicon back, have gone through metal spins and don't have any remaining major errata. They need to do one final full-layer spin to correct yield issues and/or any remaining minor problems. (If it wasn't full layer, why would sampling wait til October?). Based on the above sampling and production dates, this almost seems more realistic. (100 days from final tapeout to volume production). It's possible that they couldn't have sampled earlier due to major issues with early silicon. This scenario makes sense if they indeed taped out as originally speculated (and noted by Jen Hsun) and thought they might have OEM samples in the August timeframe.
In either scenario, we'll see NV30 in January at the earliest.
