ATI licenses 'dynamic logic' tech for faster, cheaper chips
By Tony Smith
Posted: 06/02/2004 at 11:07 GMT
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ATI has licensed Intrinsity's Fast 14 'dynamic logic' chip design technology to help it create "future consumer products" - possibly even the graphics accelerator it is designed for the Xbox 2 - aka Xbox Next.
We first wrote about Intrinsity back in 2001, after it had demonstrated a 2.2GHz chip - back than, way faster than anything Intel, AMD, IBM or Motorola had come up with. This year it began sampling a 130nm DSP chip, FastMath, that runs at 2GHz, operating at 1V. Aimed at the wireless infrastructure market, FastMath is being fabbed by TSMC, ATI's own foundry partner.
Intrinsity's technology is based on Dynamic Logic, an old-style design methodology now relegated to a few, highly performance-sensitive circuits thanks to the arrival in the 1980s of automated design software and the CMOS manufacturing process that helped make it possible.
Today's Static Logic methodology - essentially chip-building by numbers - makes for slower, less efficient processors (by between 50 and 80 per cent, Intrinsity says) but ones that could be designed, tested and put into manufacturing for more quickly and cheaply than DL-designed parts.
To do DL properly has always required very highly skilled staff - and plenty of them. No wonder, then, it quickly became uneconomic to use the technique for all but a few on-chip units.
Intrinsity claims Fast 14 puts DL design on a par with SL. The company admits DL remains harder to do, but the cost of the extra work is much lower than it once was and the premium is justified by the extra performance it yields. Fast 14 comprises enhancements to the basic building blocks of a DL processor that not only make automated DL design tools effective but have the knock-on effect of reducing circuit noise - a major barrier to higher clock speeds - and increasing gate speeds.
ATI, at any rate, is impressed. Company engineering VP Bob Feldstein believes Fast 14 can "deliver up to four times the performance per silicon dollar when compared with standard design
