Considering that we can scale the quantity of e-DRAM, the number of APUs per PE, the clock-rate and we still have compatibility as far as the ISA is concerned why would nto they use it for PDAs up to game consoles and Servers...
Are you telling me that a 65 nm MPU with few MB of e-DRAM with 1 APU ( 4 FP Units and 4 Integer Units... which we can still scale, but we assume this shoudl be the minimum... ), 1 small RISC core ( PU, very compact core ) and 1 DMAC ( graphics processor might be a custom low power one ) would consume too much Power per FLOPS/OPS ?
I think that such a chip would fit a PDA's constraints... hey, the EE+GS@90 nm ( EE runs at 300 MHz and the GS runs at 150 MHz and has 4 MB of e-DRAM with a combined 2,560 bits pipe ) measures 86 mm^2 and only requires ~8 Watts... without ever being designed with power saving features in mind ( technologies like SpeedStep can be implemented without compromising Cell's core ISA ).
You want a whole SoC to do Audio, I/O and Video Display for your PDA ?
Another thing... 4 FP + 4 Integer Units might be realized with a configurable array of 4 FP+Integer Units that operate either in Integer or FP mode... this would reduce die-area utilization and power consumption.
Cell chip:
1 DMAC
1 PU ( compact RISC core )
1 APU ( 4 FP Units and 4 Integer Units )
1 Pixel Engine + 1 Image Cache + 1 Display Controller ( takes <= the space of 4 APUs [this figure of 4 APUs was thought when thinking about the Visualizer for a console or server or a device attached to abig monitor and with higher resolution than a PDA... an HDTV compatible CRTC should be more complicated than a PDA Display Controller )
x MB of e-DRAM ( plus some slower external DRAM if needed )...
Clock this 65 nm puppy at 200-250 MHz or less and you should get a nice PDA
Why would this be good for Sony ?
Use one architecture, partially designed in-house and manufactured totally in-house, for all our ICs for all your products allowing easy inter-operation and data sharing between the devices and saving money from ordering too many chips from 3rd parties and recouping faster the R&D investment behind Cell and the new fabs.
