Leaked CPU-Z shot from HKEPC.
One notable difference is the halved set-associativity for the L2, if CPU-Z is reading it correctly.
http://www.hardware.fr/news/14211/concours-18-ans-reponses.html#commentaires → page 7.Skylake, je m'y perds moi-même Pour le moment, j'ai un stepping "R0" à 2.6 GHz de base et 3.4 GHz Turbo (4C/8T) mais pour une raison inconnue, il est toujours scotché à 3.3 GHz et les perfs sont ... étranges. Paradoxalement, la stepping A0 (qu'il faut désormais appeler Q0") avait un fonctionnement plus "logique". Par contre, c'est déjà très stable. Côté perfs, faut pas en attendre la lune et je n'ai pas encore réussi à tester l'IGP. Mais j'ai rien dit hein ? hein ? hein ?
Does CPU-Z actually 'read' stuff like that, I thought for most such details it basically just does a database lookup of whatever details it knows about the chip based off Family, Model and Stepping (plus a few other factors) and tries to find the best match?
There's a function in x86 CPUID instruction which returns cache and TLB information including size, set associative, etc. So if CPU-Z gets these data this way, it should be accurate.
Intel will release three different versions of Xeon processors for its “Purley” platform targeting different applications two years from now – “Skylake-EP”, “Skylake-EX” and “Skylake-F” – according to a report from CPU World. The new chips will feature up to 28 cores based on the “Skylake” micro-architecture with AVX512 instructions and Hyper-Transport technology, up to six DDR4 memory channels (up to two 2400MHz DIMMs per channel are supported, i.e., up to 768GB of DDR4 memory per socket without SMB), up to 48 PCI Express 3.0 lanes as well as two or three UPI channels per socket.
Thanks to massively higher memory bandwidth, increased core count, improved micro-architecture and 512-bit AVX-3.* instructions, expect Intel Xeon “Skylake” processors to offer dramatically higher performance compared to today’s central processing units for servers. The architecture of the processors will be configurable, hence, Intel will easily tailor it for custom solutions required by its large cloud datacentre clients. Moreover, the new processors are expected to integrate “Cannonlake” graphics cores and media transcode capabilities, at least, optionally.
The dimensions of the new Xeon processor packages will also be considerably larger compared to today’s LGA2011-3. Intel is currently considering 76mm*51mm or 76mm*56mm sizes, CPU World claims. By contrast, today’s Core i7 Extreme and Xeon E5/E7 chips in LGA2011-3 form-factor feature 58.5mm*51mm component size. Mainstream Intel LGA1150 processor come in 37.5mm*37.5mm packages.
I doubt Zen will be able to compete with skylake in raw performance. Also, skylake should absolutely have AVX512.
It only really needs Sandybridge level IPC if it can hit clock speeds around 4Ghz and come with 8 cores at a mainstream price. That would be a very compelling product vs Skylake.
Claimed TDP of 95W also doesn't match any announced product so far, but could theoretically be another pre-release/engineering sample hardware quirk, assuming the entire screenshot isn't faked of course.
8 sandy-comparable cores at a mainstream price? Color me sceptical, but maybe AMD doesn't want to make any profit off of the chip; it COULD happen...It only really needs Sandybridge level IPC if it can hit clock speeds around 4Ghz and come with 8 cores at a mainstream price.