Intel Skylake Platform

[Blazkowicz]

AMD Duron and such had a high pressure, and the failure mode I experienced was hitting the motherboard with a screwdriver.
Very unfortunate : in such a case where you need to apply great pressure just to remove the cooler, better do it with a friend. The issue was uncommon though : the stock heatsink, big for its time, was still like those for 486/Pentium in that you applied all pressure to one small metal part that went onto a single plastic notch. Aftermarket coolers attached to the three plastic notches on the socket.

I would rather have killed the Duron than the motherboard.

 

[ImSpartacus]

It's looking like the non-K Skylake parts might have some meaningful overclocking options as a result of Skylake giving the chipset & PCIe their own clock domain so the CPU cores can let their BCLK run free.

At first blush, it appears like this is functionally very similar to the classic FSB overclocking that we all know and love.

Anandtech compiled a couple of reports that SuperMicro, ASUS and ASRock were capable of enabling BCLK overclocking for several non-K Skylake CPUs (presumably to work for all non-K Skylake CPUs).

http://anandtech.com/show/9848/bclk-overclocking-intels-non-k-skylake-processors-coming-soon

Techspot got a hold of some ASRock pre-release BIOS and personally overclocked a 6100 to 4.7GHz (127x37) with 1.35v.

http://www.techspot.com/review/1108-intel-locked-skylake-cpu-bclk-overclocking/

This looks like the real deal... until Intel deploys a microcode update or something that breaks this functionality.

But my question is: assuming Intel didn't intend non-K CPUs to overclock, what other reasons would cause Intel to decouple Skylake's core from the uncore?

 

[CarstenS]

But my question is: assuming Intel didn't intend non-K CPUs to overclock, what other reasons would cause Intel to decouple Skylake's core from the uncore?

If it's still being pondered: Probably power reasons because you can run display self-refresh now entirely from L3-Cache if i'm not mistaken.

 

[Albuquerque]

If it's still being pondered: Probably power reasons because you can run display self-refresh now entirely from L3-Cache if i'm not mistaken.

Absolutely right on the power front, the self-refreshing display is simply one aspect. Of all the interfaces on the external ring, none of them really need to operate at the full frequency of the CPU cores. Also consider cross-traffic; your modern PCI-E video card can pull data directly from main memory by simply traversing the ring, rather than interfacing with the cores.

That ring also has its own multiplier too, this was part of the PCI-E performance firmware challenge posted further upstream in this thread. It has been found the multiplier can be moved "real time" while the OS is running, so yet another point where a subset of functions can be downclocked while lightly loaded.

 

[ImSpartacus]

If it's still being pondered: Probably power reasons because you can run display self-refresh now entirely from L3-Cache if i'm not mistaken.

Oh, it's definitely still being pondered. I appreciate your speculation. It seems reasonable.

And now that Intel has semi-formally killed non-K BLCK overclocking, we can be confident that they made the change for reasons other than overclocking.

 

[iMacmatician]

Videocardz has posted an Intel slide deck about Skylake-SP.

 

[Davros]

the self-refreshing display

wHATS ONE OF THOSE ?

 

[rcf]

"Sizing Up Servers: Intel's Skylake-SP Xeon versus AMD's EPYC 7000 - The Server CPU Battle of the Decade?"

http://www.anandtech.com/print/11544/intel-skylake-ep-vs-amd-epyc-7000-cpu-battle-of-the-decade