Intel ARC GPUs, Xe Architecture for dGPUs [2018-2022]

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Considering that diagram is for an integrated GPU, I don't see where HDMI 2.1 could come in useful other than possibly VRR support which they could still implement in 2.0b if they wanted (like NV currently). 4k/120 or 8k aren't usage scenarios that are likely to see widespread adoption for laptop users using integrated graphics. People that want 4k/120 will mostly be "core" gamers who are going to buy a gaming laptop anyway.

HDMI 2.1 would be nice, but it's not exactly needed for integrated yet.

Regards,
SB
 
Silent_Buddha said:
Considering that diagram is for an integrated GPU, I don't see where HDMI 2.1 could come in useful other than possibly VRR support which they could still implement in 2.0b if they wanted (like NV currently). 4k/120 or 8k aren't usage scenarios that are likely to see widespread adoption for laptop users using integrated graphics.
Click to expand...
Rocket Lake is a desktop product. It supports AV1 (codec developed for 8k video), but doesn't support 8k HDMI (HDMI 2.1). So it can decompress 8k video, but it can't send the 8k stream to the display.
 
no-X said:
Rocket Lake is a desktop product. It supports AV1 (codec developed for 8k video), but doesn't support 8k HDMI (HDMI 2.1). So it can decompress 8k video, but it can't send the 8k stream to the display.
Click to expand...

AV1 can (and will) be used for any resolution video. Everybody* will probably be using it in a couple of years.
 
no-X said:
Rocket Lake is a desktop product. It supports AV1 (codec developed for 8k video), but doesn't support 8k HDMI (HDMI 2.1). So it can decompress 8k video, but it can't send the 8k stream to the display.
Click to expand...

Considering that 4k is still not common on desktop and 8k monitors are extremely niche at the moment, It's likely that for any desktop user that desires 8k video, they aren't going to be interested in using the integrated GPU.

That'll obviously change over time, but currently 8k consumers of PC monitors will generally be people with very specific needs.

Regards,
SB
 
https://twitter.com/x/status/1256121849617899521
EW6jzhJUEAARssn


That's huge :runaway::runaway::runaway:
 
They've reposted the GPU image, but left out the others with Koduri & Keller and someone I don't recognize
 
Kaotik said:
They've reposted the GPU image, but left out the others with Koduri & Keller and someone I don't recognize
Click to expand...

Likely due to the fact that the face masks were not being used correctly. (Keller wasn't covering nose, Raja has a beard which means the mask can't create a seal.)

As for the chip it self, it is likely PVC because those real chips look a lot like the renders for Aurora..
intel-said-aurora-system-argonne-national-lab-will-have-six-7nm-exascale-ponte-vecchio-gpus-intel-111813-15190505.jpg
 
Dayman1225 said:
Likely due to the fact that the face masks were not being used correctly. (Keller wasn't covering nose, Raja has a beard which means the mask can't create a seal.)

As for the chip it self, it is likely PVC because those real chips look a lot like the renders for Aurora..
intel-said-aurora-system-argonne-national-lab-will-have-six-7nm-exascale-ponte-vecchio-gpus-intel-111813-15190505.jpg
Click to expand...
Yep, it does, so it should have inside 8 Compute Nodes, 4 RAMBOs and unknown amount of HBM stacks two portions with 8 Compute Nodes, 4 Rambos and unknown amount of HBM stacks each, bunched together with EMIBs and Foveros.
 
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Dayman1225 said:
So I don't think it is PVC. Ponte Vecchio is based on Xe HPC, but Raja referred to this chip as the "bapp of all"
https://twitter.com/x/status/1256123479826432000

Which he originally referenced back in December when talking about Xe HP.
https://twitter.com/x/status/1202393950771744768

So I think this chip is Artic Sound or some other Data Center dGPU, not Ponte Vecchio
Click to expand...

That package is around 81x53mm, that's ridiculously big - pretty much certainly too big for anything but a HPC chip. It's size and shape also fit the Project Aurora illustrations Intel did pretty well (yes, illustrations are just that, not necessarily accurate etc, i know)

Also, the HPC variant was a "afterthought" to begin with, maybe the HP team handles that too and was referring to it with the baap of all rather than consumer Xe-HP part

edit: also, I'm not sure if bfloat support is something you'd need in consumer product, but on HPC side it's very useful, note the Raja's "b-floating" reference
 
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Could these boards employ the much-publicized Omni-Directional Interconnect (ODI), which combines silicon interposer (Embedded Multi-Interconnect Bridge, EMIB) with 3D stacking (Foveros)?
https://www.extremetech.com/computi...irectional-interconnect-combines-emib-foveros
https://fuse.wikichip.org/news/2503...together-adds-omni-directional-interconnects/
https://fuse.wikichip.org/news/3508...l-3d-packaging-tech-gains-omnidirectionality/

AMD and NVIDIA are supposed to use the TMSC CoWoS interposer for HBM-based products.
 
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