We need performance figures. All this "Lookie!! Unified Shaders!! OMG!! Revolution in graphics!!" might just as well be deserved, but all of this doesn´t really matter until we can see how well both parts perform, so speaking on wether one has more advanced features than the other doesn´t really matter if the performance isn´t there.
How can Nvidia be ahead of ATI but 360 GPU is on par with RSX?
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I just didn't recall reading about FP10 anywhere but in Xenos articles. Maybe I didn't remember something in there.Titanio said:Maybe I misread that, but I assumed G70 supports FP10. If not, FP16 it is, for its "min" HDR precision, which shouldn't be a problem either (especially if MSAA is not a simultaneous possibility). Either way, placing it amongst "advances" over RSX/G70 etc. seems odd.
As for why it's an advantage, if your game's dynamic range can fit in FP10, it's a bit bandwidth/cache advantage. Half the color bits means less stuff thrown around and better cache usage. This is especially useful when alpha blending particles and such (read AND write per pixel). That would be the advantage of using such a mode with the RSX, to my limited understanding. Reducing bandwidth requirements looks to be important with it.
They're trade-offs, not trade-ups. If they were trade-ups, there wouldn't be any serious debate on the topic.zidane1strife said:
Too, in my opinion, I haven't seen anything on the PS3 that's just impossible on the X360. I think I've only seen one thing on the X360 that I thought would give the PS3 a hard time. Kameo's throne room has, according to the developer, over 1 million particles floating around the room. Maybe the RSX could do that, I don't know. But I do know it plays into Xenos' strength and RSX's potential weakness.
I don't see that either machine has left the other in its dust. Any significant advantage or disadvantage is most likely opinion based, unless I misunderstood the entire post.SubD said:
Jaws said:
Seeing as we all fancy throwing stupid things around, here's one to chew over:
48*5 = 240
(24*2*4) + (8*5) = 232
SubD said:
Um no what youve been seeing is a significant realworld advantage of the 7800 GTX over the x800/850... the latter of which I might add, is not SM3.0 compliant nor as fast.
What you are seeing on launch games are x800 development with Xenos optimisations. I'd wager that the improvement between what you see on x360 to date and next fall (a full year with the actual Xenos) will be significant. Much of the xenos panning here will go by the wayside...
ihamoitc2005
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Yes.
But RSX* is more capable than Xenos in all pixel-shader avalilability requirements even when all 48 Xenos unified-shaders perform as pixel-shaders. Increasing vertex shader availability beyond RSX* capability (8@550mhz) drops Xenos already inferior much pixel shader availability too much.
Best advantage of RSX* vs Xenos is constant availability of full pixel shaders through all clock-cycles. Can really max it out in all scenes. Xenos always a balancing act and always a compromise.
CELL is bonus.
No. Clock-cycles per frame is limited. More clock cycles as vertex shaders means less clock cycles as pixel shaders.
Regarding bandwidth fears, EA says ... 3 SPEs dedicated for graphics ... fill-rate limited.
Very impressive, no? Suggests something different about RSX architecture from 7800GTX.
*RSX=7800GTX @ 550 mhz (assumption based on transistor count) ... actual configuration unknown
Dave Baumann said:Seeing as we all fancy throwing stupid things around, here's one to chew over:
48*5 = 240
(48*4) + (8*5) = 232
Where's the clock rate difference?
:Xenos
48vec4*8 flops/cycle*0.5 Ghz + 48scalar*1 flop/cycle* 0.5 Ghz
~ 192 + 24
~ 216 Gflops
:RSX 24 pixel units
48vec4* 8 flops/cycle*0.55 Ghz
~ 211 Gflops
216 and 211 are on par...
And, again, you have glossed over all the architectural differences between the two parts = the ALU's and the organisation of the ALU's are not even close to being the same.
ihamoitc2005
Veteran
Efficiency
Efficiency is per scene based on vertex and pixel shader requirement. Xenos can adapt to varing needs. In scenes where 1 vertex shader is required, Xenos is efficient, but RSX wastes 7 vertex shaders, hence RSX less efficient. RSX compensates by having more pixel-shader capability than Xenos so wastage is not liability except in terms of chip size and cost.
Jaws said:
Efficiency is per scene based on vertex and pixel shader requirement. Xenos can adapt to varing needs. In scenes where 1 vertex shader is required, Xenos is efficient, but RSX wastes 7 vertex shaders, hence RSX less efficient. RSX compensates by having more pixel-shader capability than Xenos so wastage is not liability except in terms of chip size and cost.
Jawed
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Before we even start to count all the scheduling efficiencies that accrue from Xenos's scheduler, you've got basic stumbling blocks inside RSX's superscalar architecture. RSX's ALUs sitting idle because of register bandwidth restrictions, or because dual-issues are not possible on successively dependent instructions.Jaws said:
Do you seriously expect me to accept that a stall-less, zero-latency-branch pipeline is not more efficient than a conventional GPU pipeline? Have you entirely forgotten the scheduler discussions?
With predication on each pixel. See the ATI patent on nested control flow:
http://v3.espacenet.com/textdoc?DB=EPODOC&IDX=US2005154864&F=0
The big deal about Xenos is the 64-pixel batches. As opposed to 1024 in RSX. Makes a vast difference in whether code with a dynamic branch is faster or not. The ideal would be 1-pixel batches. But the scheduler/register file/batch queue would be ginormous. So the compromise is an 8x8 tile. As opposed to RSX's 32x32 tile.
Jawed
ihamoitc2005
Veteran
pixel shaders
Already explained in 7800GTX post.
blakjedi said:I saw that too
ihamoitc something about your pixel shading numbers comparison seems wrong... can you explain them again?
Already explained in 7800GTX post.
Jaws said:
I'm illustrating that these "if Xenos does this and RSX does that with the vertex shaders / pixel shaders one is less powerful then the other" trails are just stupid. It completely ignores the structure of the ALU's themselve, its ignores the the arragement of the ALU's, its ignores the efficiency of them - I mean we haven't even counted the extra 16 (filtered) texture address processors for Xenos, which uses ALU cycles on RSX; do we know if RSX has dedicated shader interpolators either?
ihamoitc2005
Veteran
clock cycles per frame
Rendering each frame takes X number of clock cycles.
Y number of clock cycles dedicated to vertex shader operations means (X-Y) number of clock cycles available for pixel shader operations no?
Jawed said:
Rendering each frame takes X number of clock cycles.
Y number of clock cycles dedicated to vertex shader operations means (X-Y) number of clock cycles available for pixel shader operations no?
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