DeadmeatGA
Banned
In the past presss reports, the CELL has been described as having "four to sixteen" cores, with four-core version intended for PDAs. Here, we need to examine what the word "core" implies. Some people has traditionally associated the term "core" with PE, meaning that the EE3 could possibly have upto 16 PEs. Then why would a PDA need four PPCs and 32 APUs? It doesn't add up.
However, everything makes perfect sense when you associate the term "core" with APU. Since the Suzuoki patent application makes it clear that the mobile version of CELL will have four APUs, associating "four cores" with "four APUs" make a perfect match. In return, EE3 will have "16 APUs" or two PEs.
So there you have it, the EE3 for PSX3 is a dual-PE device giving 128 peak FLOPS(132 if you add PPC FLOPS) per cycle, which scale to 256 GFLOPS @ 2 Ghz and 384 GFLOPS @ 3 Ghz, if SCEI somehow manages to clock it that high.
However, everything makes perfect sense when you associate the term "core" with APU. Since the Suzuoki patent application makes it clear that the mobile version of CELL will have four APUs, associating "four cores" with "four APUs" make a perfect match. In return, EE3 will have "16 APUs" or two PEs.
So there you have it, the EE3 for PSX3 is a dual-PE device giving 128 peak FLOPS(132 if you add PPC FLOPS) per cycle, which scale to 256 GFLOPS @ 2 Ghz and 384 GFLOPS @ 3 Ghz, if SCEI somehow manages to clock it that high.