Panino Manino
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Current Generation Hardware Speculation with a Technical Spin [post launch 2021] [XBSX, PS5]
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Lies. That's where the extra GPU is.
All Series consoles and PS5 have 8MB of L3 for the CPU, non-unified.
I think the conversation was probably about GPU L3 (aka Infinity Cache with the current PC RDNA 2 implementations afaik). "GPU L3" would mean something beyond RDNA 1 and console L0, L1, L2.
But yeah, there's 2 x 4MB L3 (4MB per CCX, so definitely not like Zen 3), and no discernable trace of GPU L3 / Infinity Cache. Same as always.
This is the same for both PS5 and the Series consoles. And possibly Steam Deck too, when we get to see the die shots. I wouldn't be surprised if Steam Deck piggybacks off some of the Zen 2 / RDNA2 integration work that was necessary for both Sony and MS's consoles, and has so far not seemed to appear in the PC / none-semi-custom space.
Quadbitnomial
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Yea I'm aware. I was going to clarify but I couldn't edit the post any longer. The new article does suggest there is an L3 cache by the GPU like the infinity cache which is what i'm saying there is not.
D
Deleted member 13524
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What is this that Fritz is highlighting in this shot?
If it's cache then it's obviously not an amount that is close to the 32MB we're seeing even in Navi 23. I don't know how e.g. 4MB would look like when spread this wide across the chip.
But at the very least, it does look like a thick ringbus that involves the CPU cores and their L3, the PHYs and G6 MCs, and the zone with the I/O complex + video out headers + USB etc.
If it's cache then it's obviously not an amount that is close to the 32MB we're seeing even in Navi 23. I don't know how e.g. 4MB would look like when spread this wide across the chip.
But at the very least, it does look like a thick ringbus that involves the CPU cores and their L3, the PHYs and G6 MCs, and the zone with the I/O complex + video out headers + USB etc.
Yeah, my guess is that it's IF and maybe some other fabric-y bus-y stuff in places too. IF doesn't actually go to the PHYs based on that PC block diagram, which makes sense as I think they should be connected to the memory controllers via some other dedicated interconnecty stuff. Doesn't mean that you couldn't route the IF between the parallel sets of PHYs tho for some reason or another....
If you look at the Series X die shot, you can see a similar "track" that seems to touch on the CPU CCX's, memory controllers, GPU front end, multimedia acceleration block, and maybe down to the IO block, at least on one corner (PCI-e??).
I think in PS5 we're seeing basically the same thing as in Series X, just laid out differently because the rest of the chip is laid out differently.
Edit: I've tried to highlight what I mean with some terrible Paint3D diagrams. I've added a purple line that seems to connects what I believe to be the major bandwidth users. I may have missed some stuff out.
So I think this is an AMD tech thing rather than a MS or Sony thing. I doubt there's any real secret sauce here for anyone.
Perhaps we'll see the same thing on Steam Deck, which is using a very similar collection and generation of technologies as new gen consoles.
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I honestly cant imagine that is L3/IF. Both PS5 and especially XSX seem to have memory setups that indicate they aimed to match their compute with adequate bandwidth through the traditional manner. XSX has a 320-bit bus, and PS5 a 256-bit bus. Both larger than their nearest desktop RDNA2 counterparts whose memory setups are very clearly built around Infinity Fabric.
And this makes sense, as Infinity Fabric is not very die space efficient and Sony and Microsoft dont want to make chips larger than they need to for consoles that will be made in the tens of millions.
Basically, there's no need for the IF on PS5 and XSX. And such a small amount(if this were to be IF we're looking at) would be pretty ineffectual anyways. Then given that neither Sony nor Microsoft has come out and said that they're utilizing a critical bandwidth-boosting tech like Infinity Fabric, I think the simplest and most obvious answer is that it's not there.
And this makes sense, as Infinity Fabric is not very die space efficient and Sony and Microsoft dont want to make chips larger than they need to for consoles that will be made in the tens of millions.
Basically, there's no need for the IF on PS5 and XSX. And such a small amount(if this were to be IF we're looking at) would be pretty ineffectual anyways. Then given that neither Sony nor Microsoft has come out and said that they're utilizing a critical bandwidth-boosting tech like Infinity Fabric, I think the simplest and most obvious answer is that it's not there.
It seems this search for dark sillicon, second gpus, zen3 cpus, rdna3, infinity cache etc, its in parallel with this Abandoned scam. Is it corona virus or are some really that bored? I dont remember previous generations of hardware where online forums clang on this long to secret sauce hardware.
I think you mean Infinity Cache. Infinity Fabric is something else and is present in more or less every AMD SoC.
Cardassian Bob
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You've obviously never heard of Misterxmedia.
I was around, but didnt register here. Your right but that was a special case, its different times now with tweets, more social media influence etc.
I think you may have accidentally used 'IF' (Infinity Fabric) instead of 'IC' (Infinity Cache). Infinity cache is the big GPU L3, Infinity Fabric is an interconnect between various components used on both AMD GPUs and CPUs e.g. connecting the two CCXs on a Zen 2 chiplet, or connecting one chip on a multi-chip-module to another.
If you're talking about Infinity Cache, then I'd agree with everything you're saying.
There are an awful lot of acronyms out there. And if you dig into one you normally find out it's made up of of several more. It's acronyms all the way down ....
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