Could be more RSX info...

Dave Baumann said:
You've taken this quote in the wrong context. The context is not "independent from the pipes text above" but indepentant from each other (i.e. they are not unified).

To be even more clear pixel/vertex pipelines are Multi-way parallel programmable FP shader pipelines and they are independent because they can only processe vertex or pixels but not both. For example in Xenos they are not independent.
 
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aaronspink said:
I keep telling you, Beyond 3D needs an IQ test to post. But no, you believe that humanity will overcome. Well...

Aaron Spink
speaking for myself inc.

:LOL: :LOL: :LOL: Can we make a petition?
 
Dave Baumann said:
Xen, Regardless of whether it says the VS/PS are independent does it mean to say that these are different from the "Multiway parallel FP shader pipelines". What is, for instance, a group of pixel shader if they aren't inhernatly and Multiway parallel FP shader pipelines? I could equally describe 6 quads of shader pipelines as a "farm" with each quad being a "Multiway parallel FP shader pipeline".

Your trying to lump these parallel FP shaders with conventional pixel shaders to make your point, when its clear as day in black&white print they are seperate.

And if they are the same why bullet point them seperately on the slides, i suppose to fill up space.

Anyway the numbers wouldnt add up. He specifically says a farm of programmable shader pipelines/processors EACH able to process 136 shader ops per cycle simultaneously.

Isnt this more number of ops as what 6 quads could do in a cycle?
 
Xen said:
And if they are the same why bullet point them seperately on the slides, i suppose to fill up space.

What do you think they invented bullet pointing for? Well, at least, one of the two reasons. :smile:

Xen said:
Isnt this more number of ops as what 6 quads could do in a cycle?

Or exactly what 6 PS quads and 8 VS could? ;)
 
Let's not turn this thread into something it's not meant to be

Xen said:
How they all work in the GPU god only knows (well Nvidia and sony)
According to you, there's quite a few Gods on this board. And your actually in disagreement with all of them.

Hint, RSX architecture is a secret to the public.
Second Hint, a lot of people on this board are not to be categorized as part of the "public".

Simply put, just wait for the release of the specs.
Note that RSX was said to use next-gen Nvidia technology, at the time it was presented, the Geforce 6 line was their current gen, meaning that the G70 (Geforce 7) would be their next-gen.

No need to create fantasy scenarios (proprietary sub-engines?) based on nothing but imagination. It's not like a G70 based RSX wouldn't be powerful enough.

I know that people on this forum, the technology enthusiast folks, are never content with the specs of any console ever. If it has 256MB of RAM it needs 512. If it has 512, then it needs 1GB, and so on.
But still, let's keep the speculations at reasonable level, especially so close to the launch.
 
"But still, let's keep the speculations at reasonable level, especially so close to the launch"

It is reasonable to talk about possible multi-core GPU's and things everyone wishes to speculate on since only those under NDA's know the truth.
 
leechan25 said:
"But still, let's keep the speculations at reasonable level, especially so close to the launch"

It is reasonable to talk about possible multi-core GPU's and things everyone wishes to speculate on since only those under NDA's know the truth.
Oh for pete's sake, once again, a multi-core GPU MAKES NO SENSE. The only reason you have multi-core CPUs is that you have diminishing returns trying to extract instruction level parallelism (ILP) from the code. In other words, adding more execution units and make it a wide superscalar processor won't help anymore. Therefore they add more cores to try to take advantage of thread level parallelism (TLP). This only works when and if there are multiple threads running in the OS to run simulatenously.

GPUs are completely different; they are massively parallelized from the get go, since the problem space they approach is conducive to this. In the GPU world, you CAN just add more execution units since you're already operating in parallel.* So making a multi-core GPU would be silly; you'd be much better off taking the same die space and make a "wider" GPU. All the multi-core part would do is add extra overhead for dividing up the problem and recombining the results. It would not make any sense, which is why you have yet to see a multi-core GPU released or even announced anywhere.

Please let the "multi-core GPU" meme die.

Footnote:
*Assuming you have the bandwidth to feed those extra execution units. Of course, if you don't have the BW, then when you make it multi-core you still won't have the BW, so same difference as far as this argument goes.
 
Xen : O think it safe to say you're interpretting the information wrongly. eg. The nVidia slide states "Programmable Shading Processors - 136 shader operations per second". It doesn't clarify 136 per processor, or a 136 for the whole RSX.

Now even if Jen-Hsun Huang explicitly says multiple processors each at 136 ops per second. that can't be considered conclusive because there's evidence that suggests otherwise. Hence there's two conflicting POVs to choose between. Just work out how expensive and power hungry and hot you idea of RSX would run, and then decide if you think that's plausible. No-one else here thinks it is. So either nVidia and Sony together have a totally new CPU manufacturing system that isn't victim of the thermodynamic limitations of existing conventional methods wilst also being far far cheaper, or there's a misunderstanding of the information given us, or the information given us is clear but wrong, such as Jen-Hsun Huang actually saying there were multiple processors each capable of 136 shader ops a second but making a mistake in his speech, which does happen. If he minced his words, the slides are clear in not saying multiple lots of 136 op/s, which if that was a key feature would have made it to the slide. Every chance to boast numbers they get, they do, so we'd be hearing about RSX having 272+ shops (SHader OPerations a Second).

You raised the question and have had your replies. Now consider the glut of evidence on all sides and decide the most probable outcome for RSX, rather than taking only a single communication.
 
Quoting Sony slides from E3 on the RSX GPU doesn't seem wise to me at all. That information just seems to be presented as generic specs to give people confidence the PS3 is comming. If at the time of E3 they started to talk about the PS3 and said nothing about the GPU, they would have gotten skewered. I think the RSX generic info was just a tool for the marketing department, just as the Killzone video was.

Since the G80 was probably in it's early stages around the Sony contract sigining, it makes more sense to me to have that team focus on making a basic part for a console and hand that off to Sony. Then use that basic part as a starting point to add the bells and whistles for the PC market. The notion of taking an already completed architechture design, the G70, and trying to untangle and cut the stuff you don't want, and add stuff you do would be complicated. On the other hand you have another design, the G80, in the pipeline with a basic skeletal structure that needs to be fleshed out.

Also the 128 bit bus bandwidth with GDDR-3 seems almost absurd to me, when your rival has designed a GPU like Xenos with a secondary chip with 10mb of eDRAM to allow for full 4x A.A. and HDR. Then you take into account Sony has worked with Rambus already and trusted them to design the memory interface for CELL and a GPU is just as dependent on bandwidth as CELL. It also helps Rambus is located near nVidia and Rambus would have an easier time making the RSX memory interface work with CELL since they designed it.
 
Educate me

Brimstone said:
Also the 128 bit bus bandwidth with GDDR-3 seems almost absurd to me, when your rival has designed a GPU like Xenos with a secondary chip with 10mb of eDRAM to allow for full 4x A.A. and HDR.

May I ask you what's absurd about the bolded part of your quote? I'm trying to understand what was the point this part of your post? What were you getting at?
 
Brimstone said:
Also the 128 bit bus bandwidth with GDDR-3 seems almost absurd to me, when your rival has designed a GPU like Xenos with a secondary chip with 10mb of eDRAM to allow for full 4x A.A. and HDR. Then you take into account Sony has worked with Rambus already and trusted them to design the memory interface for CELL and a GPU is just as dependent on bandwidth as CELL. It also helps Rambus is located near nVidia and Rambus would have an easier time making the RSX memory interface work with CELL since they designed it.

I thought often of the idea of halfway with the memorybus like 192-bits bus instead of 256-bits if this is so critical. I think XGI should do this(?) in their future parts.
I guess that it could mean either 192MB of VRAM or 312MB VRAM if they did this but not sure if its feasible? Anyone else, Dave maybe? The former would seem bad versus the competition and the latter more expensive.
 
Brimstone said:
Also the 128 bit bus bandwidth with GDDR-3 seems almost absurd to me, when your rival has designed a GPU like Xenos with a secondary chip with 10mb of eDRAM to allow for full 4x A.A. and HDR. Then you take into account Sony has worked with Rambus already and trusted them to design the memory interface for CELL and a GPU is just as dependent on bandwidth as CELL. It also helps Rambus is located near nVidia and Rambus would have an easier time making the RSX memory interface work with CELL since they designed it.

Well at least Cell and RSX has its own memory, could you even imagine if it was more similar to Xbox ? where it shared that 128 bit bus between CPU and GPU.
 
Brimstone said:
Also the 128 bit bus bandwidth with GDDR-3 seems almost absurd to me, when your rival has designed a GPU like Xenos with a secondary chip with 10mb of eDRAM to allow for full 4x A.A. and HDR. Then you take into account Sony has worked with Rambus already and trusted them to design the memory interface for CELL and a GPU is just as dependent on bandwidth as CELL. It also helps Rambus is located near nVidia and Rambus would have an easier time making the RSX memory interface work with CELL since they designed it.

Didn't a dev on this board hinted another 128 bit bus bandwidth reserved for the OS? Maybe I misread the post, but it sure sounded like a hint.
 
Shifty Geezer: thanks for the reply, I tried to be level headed in this discussion and concede that the information presented can be interpreted in two ways. In fact your the only person who has challenged what ive been saying directly. The possibility of Jen-Hsun Huang making a mistake during his speech is reasonable but then that would make all his information questionable, certainly not the evidence that should provoke such strong views.

I'm basing my opinion on both the slides and his speech. My strongest argument amongst other things lies here:

Jen-Hsun Huang
"the heart and soul of the rsx, the programmable shading processors, the rsx can process 136 shader operations simultaneously in one clock"


adv
SIMULTANEOUSLY, at the same time, at one time, all at once formal concurrently

Now when I read this sentence its obvious he's trying to get across the importance of these shading processors. Going as far as to say they are "the heart and soul of the RSX." Then an idea of performance: 136 shader operations simultaneously in one clock.

Jen-Hsun Huang
"we want to achieve that level of realism in order to do that we've incorporated a farm of programmable shading processors."


verb
FARM, subcontract, pass/give to others, delegate, contract out

To me means there will be a plurality of said shading processors. Its up for debate, but as these are "the heart and soul of rsx" I feel this is related to the first sentence. Don't agree, then up to you, the first sentence means a plurality of them anyway.

Now the E3 slides can be interpreted in many ways I understand what your saying and ive already covered those anyway so I'll leave it there.

So there you have it 2 opposing views, one offering much more performance than the other (closer with the performance needed for killzone, motorstorm et al) anyway should be fun to see the final specs, hope all this heated debate was worth it.

ps didn't mean to ruffle any feathers here just had some views of my own ;)
 
Xen said:
verb
FARM, subcontract, pass/give to others, delegate, contract out

Except in his statement he used Farm as a noun...

ps didn't mean to ruffle any feathers here just had some views of my own ;)

Seriously, when you are grasping at semantical straws in order to share your view, it's not really that you're ruffling feathres...just causing lots of people to scratch their heads and ask..."um...why?"
 
Xen said:
I'm basing my opinion on both the slides and his speech. My strongest argument amongst other things lies here:

Jen-Hsun Huang
"the heart and soul of the rsx, the programmable shading processors, the rsx can process 136 shader operations simultaneously in one clock"


Now when I read this sentence its obvious he's trying to get across the importance of these shading processors. Going as far as to say they are "the heart and soul of the RSX." Then an idea of performance: 136 shader operations simultaneously in one clock.

Jen-Hsun Huang
"we want to achieve that level of realism in order to do that we've incorporated a farm of programmable shading processors."

"The heart and soul of the G70 are the vertex/pixel shaders, the G70 can process 136 shader operations simultaneously in one clock.

We want to achieve that level of realism, in order to do that we've incorporated a number of vertex/pixel shaders"

Now why are my statements above incorrect? All I have done is substituted a couple of perfectly interchangable words (in terms of them retaining the same meaning) for the sake of clarity.
 
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Xen said:
the rsx can process 136 shader operations simultaneously in one clock
If you have tanscribed that verbatim, then he's saying categorically RSX's performance is 136 shops. This plurality of processors are the shader units, and these work simultaneously. I'm not seeing any ambiguity in these statements, and the idea of a 136 shop, multi shader pipelined GPU fits in with the other data we have. That's why I and everyone else hear isn't expecting anything out of the ordinary. The term 'processor' might have connotations for you, but a processor is fundamentally a collection of logic circuits that work on data and can describe any of a number of types, including a pixel or vertex pipe.
 
mckmas8808 said:
May I ask you what's absurd about the bolded part of your quote? I'm trying to understand what was the point this part of your post? What were you getting at?

Because GPUs need all the bandwidth they can get. Sony realised this before with PS2, and ATI with Gamecube and X-box 360.

Why spend 5 years building a CPU, but then when it comes to the GPU not tackle the bandwidth problem? A bigger bus than 128bit isn't really an option because of the goal of die shrinks to reduce costs. So really the two choices are eDRAM or Rambus. At least with Rambus you can still go with a large GPU die for a performance advantage over Xenos, and get plenty of bandwidth from the Rambus signaling.
 
Brimstone said:
Because GPUs need all the bandwidth they can get. Sony realised this before with PS2, and ATI with Gamecube and X-box 360.

Why spend 5 years building a CPU, but then when it comes to the GPU not tackle the bandwidth problem? A bigger bus than 128bit isn't really an option because of the goal of die shrinks to reduce costs. So really the two choices are eDRAM or Rambus. At least with Rambus you can still go with a large GPU die for a performance advantage over Xenos, and get plenty of bandwidth from the Rambus signaling.

Oh okay thanks.
 
Brimstone said:
So really the two choices are eDRAM or Rambus. At least with Rambus you can still go with a large GPU die for a performance advantage over Xenos, and get plenty of bandwidth from the Rambus signaling.

Rambus is not an alternative to embedded memories. After all, it is still an external memory bus, so it won't give you the same absurd performance advantage that on-die memory can give you.
 
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