ATI to launch Radeon 9500 and 9700 on the 18th

Clashman said:
Joe DeFuria said:
To be fair to DadUM...we certainly don't know that for sure. It may be a R300 with 4 pipes disabled, it may be a different chip.

Also, it seems highly unlikely to me (and I believe Russ had a discussion on this), that ATI would "test to see if 4 pipelines are bad, and use those bad chips for the 9500."

If it is an R300 chip, it's more likely that it's simply a speed binned R-300 that didn't validate at 325 Mhz, and has 4 of its pipelines disabled...regardless of whether or not "they work".

Makes you wonder if there'll be a hack to enable those other 4 pipes, similar to, I think it was, the 3dfx Velocity products.

Velocity was a Voodoo3 with one TMU disabled. There was a combination BIOS and registry hack that would re-activate that TMU. :)
 
Joe DeFuria said:
That actually makes a lot more sense to me than the 9500 Pro (8 pipe, 128 bit interface) rumors. I hope it's true.

Once the products hit the pipeline in volume, we should see the 9700's selling at around $250 U.S. and the 9500's around $150.

That would make a very good line-up for ATI IMO. The products (From the 9000 up to the 9700 Pro) are differentiated enough to make a clear and justified separation in price-points.

This makes way more sense to me as well. Why keep 8 pipes if you're just going to be limited by memory? It also is less confusing, IMO...and with these cheaper 9700s at $299, which really means <= $250 online, I'm first in line to buy one! ;)
 
From a cost reduction standpoint, 128bit makes more sense.

Cheaper boards to produce. Less memory chips.

Of course, ATI won't be reaping those benefits, but their OEMs will. (and the customer)

They may also purposefully cripple their parts to differentiate them, but they'll still make less money on those parts than the full blown ones.
 
RussSchultz said:
From a cost reduction standpoint, 128bit makes more sense.

Cheaper boards to produce. Less memory chips.

Of course, ATI won't be reaping those benefits, but their OEMs will. (and the customer)

They may also purposefully cripple their parts to differentiate them, but they'll still make less money on those parts than the full blown ones.

I think you're underestimating the importance of pressing their technology advantage to regain market share. Honestly, it would be the most cost effective for Nvidia and ATi to just make GF4 MXs and R9000, but the simple truth is they'd quickly be pushed out to the fringe of the market along with other value lines (SiS, Trident, etc). I'm sure some of ATI's moves aren't going to maximize profit for them, but then again that's what's good about competition right? I'm just saying it's not just all about price.
 
It almost seems as if some of you are suggesting that they won't "test to see if one set of four pipelines is failed" and use those as 9500's because it would be too expensive. If that is indeed the argument, then I simply don't understand. Shouldn't every 9700 be tested to ensure it is functioning properly before it is packaged? If it fails, could it not then be turned into a 9500?

If the argument is that ATI is simply getting too high of yields and "pass" parts to fulfill the demand for the mainstream 9500 part, then that I can understand. Just wanted to be clear on this.
 
Parts do not (generally) fail in nice little ways that allow you to recover parts reliably and regularly. Maybe some particulate has disrupted the memory controller, or caused a catastrophic short in one of the pipes that renders the entire chip useless. Maybe the reticle is having tracking problems in part of the wafer. Maybe it won't work quite up to speed. Maybe somebody left it in the oven too long.

There's such a long list of maybes that relying on the unknown number of cast offs, or predicting the dominating failure mode( so that you can remove that feature from your cheaper product line) that it just doesn't make business sense to pursue that route.

If ATI is selling the chips for cheaper, they need to somehow make it cheaper. Silicon area costs money, and so does packaging (particularly the fancy packaging). I'm guessing the 9500 is either a new chip that derives from the same pipelines, and is smaller because those pipelines are removed; or its the same chip in a cheaper package with less pins, or both.
 
RussSchultz said:
Parts do not (generally) fail in nice little ways that allow you to recover parts reliably and regularly. Maybe some particulate has disrupted the memory controller, or caused a catastrophic short in one of the pipes that renders the entire chip useless. Maybe the reticle is having tracking problems in part of the wafer. Maybe it won't work quite up to speed. Maybe somebody left it in the oven too long.

There's such a long list of maybes that relying on the unknown number of cast offs, or predicting the dominating failure mode( so that you can remove that feature from your cheaper product line) that it just doesn't make business sense to pursue that route.

If ATI is selling the chips for cheaper, they need to somehow make it cheaper. Silicon area costs money, and so does packaging (particularly the fancy packaging). I'm guessing the 9500 is either a new chip that derives from the same pipelines, and is smaller because those pipelines are removed; or its the same chip in a cheaper package with less pins, or both.

The chip can be designed such that pipelines can easily be disabled with small changes on the PCB, or even in the drivers (there used to be (maybe still is) a regentry that let you disable the second pipeline on the original Radeon). It makes a lot of sense to do this. If a short occures in one pipeline, just disable that 4 pipeline block, even cut the power line to it. I can't see the hard part in doing this and it's likely that an error in the chip is somewhere in either of the 4x1 blocks (if it's designed as two 4x1 blocks).
 
I think one point that should be stressed is if ATi is doing this, then they obviously designed the architecture in such a way that it would be possible. It's not like they just took a chip and then decided they'd try to disable half of the pipes if they don't work. They'd have taken it into consideration during the design and made it so that half the pipes could easily be disabled.

I'm not sure whether they are reusing failed chips or not, but it doesn't seem out of the realm of possibility. Even if they aren't using completely defective chips, that doesn't mean some of the speed-binned non-Pro 9700s can't be repackaged in such a way that half of the pipes are disabled with a 128 bit bus to make them cheaper as well.

Ignoring that, completely, I think it's safe to assume that there is enough commonality between the design of the R9700 and the R9500 that the second project wouldn't be the same as making a whole new project from scratch, even if it isn't just a R9700 with stuff disabled. To be honest, I don't care how they do it, as long as they get me a nice performing card for a decent price (provided they don't run themselves out of business in the process...I don't want the days of $500 GF2 Ultras to return).
 
I'm not sure whether they are reusing failed chips or not, but it doesn't seem out of the realm of possibility.

I can't remember exactly, but I still get the impression that I've been told this (by ATI) when I spoke to them about it.
 
I think 64 Mb of memory is a bit odd.
Hasn't it quite clearly been shown that 128 Mb cards have a distinct advantage over 64 Mb ones? In most situations, a bigger advantage than an extra TMU gives?
If I recall correctly, the price difference between (otherwise identical) cards with 64 and 128 Mb is small.
Plus, the super market argument: If one card (Ti4200) is marketed as 128 MB, and the 9500 as 64 Mb: Well, you know the drill...

Of course, the price difference may be big enough to be prohibiting in this market segment, but it still feels strange.

Do notice that I did not say anything about the rumour's credibility! ;)
 
But why use BGA? Standard modules go to 275MHz and I would assume they would use that if the memory will be capped at this speed.
 
from Wavey's P10 technology preview:

It's long since been suggested that 256-bit memory interfaces are not particularly feasible on consumer desktop chips due to the increased board costs to facilitate the increased number of trace lines a 256-bit bus requires; however, with the introduction of small package BGA memory chips, the connector density has largely negated this issue and driven the costs down. 3Dlabs estimate that the board costs of a 256-bit bus via BGA memory packaging is comparable in price to current 128-bit bus boards using conventional memory (at similar speeds)...

If the density of routed connections on the PCB using BGA can largely offset the cost of going from 128-bit to 256-bit memory interface, does it not stand to reason that it could also offset the increased cost of the memory modules themselves?
 
from Wavey's P10 technology preview:

It's long since been suggested that 256-bit memory interfaces are not particularly feasible on consumer desktop chips due to the increased board costs to facilitate the increased number of trace lines a 256-bit bus requires; however, with the introduction of small package BGA memory chips, the connector density has largely negated this issue and driven the costs down. 3Dlabs estimate that the board costs of a 256-bit bus via BGA memory packaging is comparable in price to current 128-bit bus boards using conventional memory (at similar speeds)...

If this is the case then the margins on the higher end parts might not be as poor as I had thought. ATi could be making some rather fat margins if the burden of cost is not too high on the card manufacturers.
 
Humus said:
The chip can be designed such that pipelines can easily be disabled with small changes on the PCB, or even in the drivers (there used to be (maybe still is) a regentry that let you disable the second pipeline on the original Radeon). It makes a lot of sense to do this. If a short occures in one pipeline, just disable that 4 pipeline block, even cut the power line to it. I can't see the hard part in doing this and it's likely that an error in the chip is somewhere in either of the 4x1 blocks (if it's designed as two 4x1 blocks).

Dunno, I'm more inclined to follow Russ' line of thinking. It only makes sense if ATI know/knew that a substantial number of R300 chip will have flaws in a pipeline (block). Otherwise it is as Russ says, rather expensive to sell that 110 m transitor behemoth at smaller margins. A new tapeout with 4 pipe and pin out for a 128 bit bus should be cheaper in the long run - and I think that ATI want this R 9500 to last more than half a year, right? ;)
 
I wonder for a 256MB-one ;)
...but, will that be enough? :rolleyes:

BTW, the Velocity100 was even easier to 'hack' by the installation of the v3-drivers 8) still one of the best budgetgamecards ever made!
 
Sabastian said:
The cost of producing the chips though shouldn't be too bad as they are being created at the tried and true .15um process

Well, some time ago, Dave (I guess) posted an assumtion/expectation by PVR about the R300 manufacturing costs based on TSMC pricing. It was well over 100 USD/chip... !

and that recently TSMC has lowered the cost of producing chips on this process substantially.

I must have missed that. Do you still have to source?
 
I don't think switching off pipelines has much to do with increasing yields. But turning off parts of the chip reduces power consumtion which allows simpler and cheaper board layouts.
 
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