Are you ready ? (Nv 30 256 bit bus ?)

[Bigus Dickus]

Just to throw in my OT $.02

It's entirely likely that the Honda S2000's I4 is more expensive than a similarly powered V8. You're paying a premium for the weight savings.

Oh, and an I6 (inline 6) is more or less a perfectly balanced engine... better than a V8.

 

[Dio]

INITIALLY OFF TOPIC ALERT

With engines there are so many options. We've barely scratched the surface. There are lots of extreme of 'extreme great engine' (even staying with road engines rather than race engines) that we haven't even discussed

- there's the Hayabusa turbo bike engine - which because of the turbo still has decent torque, but power in spades, 12000RPM, and ultra-light weight
- The McLaren F1's 6-litre V12 that still only weighs about 250kg.
- BMW's 3-litre V6 turbodiesel which performs nearly the same as the petrol version
- the Skyline GTR's 'tune it how you like it' special - 350bhp for a chip change, and 400-600bhp easily available with minor (but increasingly expensive!) tweaks
- anything by TVR
etc.

I like a V6 - best compromise between availability/cost (a V8 isn't an option in the UK unless you have silly money to spend), performance and the excellent noise it makes when you apply plenty of the loud pedal

BACK ON TOPIC

The comparison with V8 vs. 4 cylinders and video cards isn't particularly valid. There's no doubt that 256 bits is A. more bandwidth and B. more expensive than 128 bits.

But, there is a car analogy. In the same way that you wouldn't put a BMW V12 in a Robin Reliant, or a Ford 1.1 in a Ferrari, you need to match the engine and the platform. If you don't have the core power to use 256 bits, save the cost. If you can't achieve your maximum performance without 256 bits, you're wasting money by NOT putting it in - you should have aimed lower with your core and saved cost there.

 

[T2k]

Well, nividia has some more "info" on the "are you ready" page.

This statement is maybe of a little bit of interest:

This new GPU uses the world's fastest memory technology, delivering higher performance than any other GPU-there's simply no substitute for effective memory bandwidth," he says

To me, that indicates a 256 bit bus.
Now, there's of course some "complains" about the R9700 in it also. Who would have thought ?

[/quote]

For you.
Now I'm almost sure: we'll see a 128bit bus. ('effective' - bah...)

 

[T2k]

Efficiency will be the buzzword in coming weeks

Correct. After all, if they can suprass R300 in terms of perfomance (with AA, ANISO of course) while still utilizing a 128-bit memory bus (all rumours folks ), then I see no point in using 256-bit memory bus (the chips would be cheaper to make as well, which means further potential for lower prices over time...).

R9700 IS cheaper than Ti4600 was in Marc - why yuo gonna force the old 128bit? I don't understand this: the chips would be cheaper - hehe, an R9700-based card costs now $300 equipped w/ 256bit bus...

The whole idea is pointless, IMHO.
It's ridiculous, there's no reason to stuck w/ 128bit bus in the future - even if NV30 can surpass R300...

 

[Bjorn]

For you.
Now I'm almost sure: we'll see a 128bit bus. ('effective' - bah...)

Well, he also said "fastest memory technology on the planet".
Who cares about that if the final raw bandwidth ends up much lower then the R9700 ? (imo, the bus width is part of the "memory technology")

As i see it, the two statements doesn't make sense unless he means raw bandwidth. On the other hand, why not say that instead ?

 

[nAo]

The whole idea is pointless, IMHO.
It's ridiculous, there's no reason to stuck w/ 128bit bus in the future - even if NV30 can surpass R300...

It could be a trade-offs matter, 128 bit bus + fast memory or 256 bit bus +'slow' memory. Maybe a 256 bit bus + fast memory is too expensive at the moment.
On the price front, who do you believe is making more money on the hw? ATI with the r300 or NVIDIA with gf4?

ciao,
Marco

 

[SteveG]

Well, nividia has some more "info" on the "are you ready" page.

This statement is maybe of a little bit of interest:

This new GPU uses the world's fastest memory technology, delivering higher performance than any other GPU-there's simply no substitute for effective memory bandwidth," he says

To me, that indicates a 256 bit bus.

I would wager that when he says "fastest memory technology" he is referring to DDRII at 500MHz (1 GHz). Fastest memory technology, not memory bus width . If NV30 uses a 256 bit bus, then I'll lose all respect for the Rumor Mill.

 

[T2k]

The whole idea is pointless, IMHO.
It's ridiculous, there's no reason to stuck w/ 128bit bus in the future - even if NV30 can surpass R300...

It could be a trade-offs matter, 128 bit bus + fast memory or 256 bit bus +'slow' memory. Maybe a 256 bit bus + fast memory is too expensive at the moment.

Don't forget: I think about future implemetations...

On the price front, who do you believe is making more money on the hw? ATI with the r300 or NVIDIA with gf4?

ciao,
Marco

Hmm, good point.
But we talk about NV30 - I compared the starting prices of 9700 and Ti4600. According to pricing history of NV (expensive)... what do you expect for NV30? And then who gonna make more money?

 

[Vince]

The whole idea is pointless, IMHO.
It's ridiculous, there's no reason to stuck w/ 128bit bus in the future - even if NV30 can surpass R300...

This comment is ridiculous. Their are ways of rendering which can minimize the necessary bandwith by a factor of upto 10. Even if they achieve only 40% of this and pursue this route, then a 256-bit bus would yeild NO improvement. Whats so hard to comprehend.

All it would do is: a) add unnecessary costs, b) allow people like you to make a fool out of yourself by repeating and buying into nomenclature and not the actual technical merits.

SA's question on how many FPS can be drawn with 1 pixel pipline @ 500mhz if you could eliminate ineffeciency and overdraw was beautiful. The fact is, it could preform better - with a more consistent FPS - than an 8 or 16 pipelined monster thats clocked slower. Yet, people like you need to have bigger numbers... elegance is beauty, brute-force is not.

Even if nVidia doesn't have an exotic rendering scheme, the principle remains: Why should nVidia add unnecessary overhead/costs if they don't have to just so people like you can get off to numbers?

"fastest memory technology"

Actually, if you want to read into this comment; Fastest Memory Technology seems to imply not a clockspeed or bus-with, but rather DDRII itself. Clockspeed and bus-with would be more functions of lithography and manufacturing choices. DDRII is a technology.

 

[KimB]

Let me just chime in with a little bit more:

If nVidia can indeed deliver with a card that outperforms the Radeon 9700 with a 128-bit bus (even in the higher FSAA modes...which wouldn't be easy...), then nVidia is in a far, far better position with the NV30 architecture than ATI is with the R300 architecture.

Since nVidia sells chips, they will have an easier time having board designers pay more for them, since board designers won't have to pay as much to put out a similarly-performing product. Compound this with the cheaper packaging for the nVidia chip, and you have a win-win situation all around.

While it does appear that nVidia's choice to go with .13 micron was bad in the short-term, it almost certainly was a good idea in the long-run. That is, ATI will have to do much of the work in did with the R300 all over again when it moves to .13 micron. By the time nVidia's NV35 comes is being worked on in full, they will be able to focus more attention on delivering higher performance, better image quality, and more features than just having to worry about the die process, since they currently have the experience with it that ATI does not. Given nVidia's higher capital, this could mean quite a lot.

I think that pretty much covers that nVidia should be in a good position entering next year. The only question is, what will the release timing of the NV40 and R400 be?

 

[Dave Baumann]

All it would do is: a) add unnecessary costs, b) allow people like you to make a fool out of yourself by repeating and buying into nomenclature and not the actual technical merits.

Vince, regardless of the underlying architecture, equally exactly the same can be levied against a 128bit solution relying on high speed/low supply DDR-II. What solution is more expensive initially? Given the number of manufacturers that have adopted the 256Bit bus route its fairly safe to say that the major cost barrier of 256Bit has been surpassed with BGA packaging – can you say that 256bit busses are really more expensive than high speed DDR-II?

 

[Vince]

What solution is more expensive initially? Given the number of manufacturers that have adopted the 256Bit bus route its fairly safe to say that the major cost barrier of 256Bit has been surpassed with BGA packaging – can you say that 256bit busses are really more expensive than high speed DDR-II?

Excellent point Dave, but you of all people have seen nVidia's design paradigm - they're allways pushing the envelope of a technology that has a long-term future; with the expressed understanding that after the brief period of higher costs, once they equalize in the marketplace, they will be ahead significantly.

Infact, we probobly had this same discussion when the Nv10 DDR came out and prices were high, supply low. And look where it got them in the future. Or with the Nv15 when they pushed and used the 0.18um lithography process thats was barely ready for primetime and yeilding low - after it equalized they had a significant advantage.

Moving to a 256-bit bus - while your probobly right and the overhead is significantly dilluted compared to where it once was - has NO long term future. You get a 2X bandwith advantage [ideally] and thats it - DDRII will scale and provide them with added bandwith for quite sometime.

So, whatcha think?

 

[Grall]

Vince:

"Actually, if you want to read into this comment; Fastest Memory Technology seems to imply not a clockspeed or bus-with, but rather DDRII itself. Clockspeed and bus-with would be more functions of lithography and manufacturing choices. DDRII is a technology."

But DDR2 is not the fastest memory tech on planet Earth. 1T SRAM is faster, pure SRAM is faster still...

*G*

 

[nAo]

Given the number of manufacturers that have adopted the 256Bit bus route its fairly safe to say that the major cost barrier of 256Bit has been surpassed with BGA packaging – can you say that 256bit busses are really more expensive than high speed DDR-II?

Factorize R&D costs or the 'new' bus too.
However, how efficient can be a 256 bit bus coupled with DDR-II memory mastered by 4 memory controller (with or without crossbar..)?
Every channel would access (but I'm not very confident on this, please correct me..) to 8 bytes (64 bit wide channel) x 4 (min burst) = 32 bytes, at time. Now..with stuff like 128 bits buffer and textures efficiency is gonna up...but I believe that is not a good granularity access at all for current and near future applications.

ciao,
Marco

 

[Dave Baumann]

Excellent point Dave, but you of all people have seen nVidia's design paradigm - they're allways pushing the envelope of a technology that has a long-term future; with the expressed understanding that after the brief period of higher costs, once they equalize in the marketplace, they will be ahead significantly.

Again, how does this differ? ATI/Matrox/3Dlabs have pushed the envelope in terms of bandwidth by going 256bit – in the case of ATI when costs equalizr in the marketplace they also have the option of going DDR-II. Seems to me to be similar strategies but from different approaches.

Moving to a 256-bit bus - while your probobly right and the overhead is significantly dilluted compared to where it once was - has NO long term future.

Of course it has a long term future, I think its safe to say that we’ll see we’ll see more of this over time.

You get a 2X bandwith advantage [ideally] and thats it - DDRII will scale and provide them with added bandwith for quite sometime.

But if you opt for a 128bit bus that’s it – you can only seek faster RAM. If you go for a wider bus you can have both if its DDR-II capable, which ATI's is. Even then, if the board cost really are an issue (which I don’t think they are – 9700 non-pro will give us a good indication) you still have the further option of chopping it down to 128bit for other variants.

You appear to be arguing up a blind alley.

 

[Vince]

Again, how does this differ? ATI/Matrox/3Dlabs have pushed the envelope in terms of bandwidth by going 256bit – in the case of ATI when costs equalizr in the marketplace they also have the option of going DDR-II. Seems to me to be similar strategies but from different approaches.

Um, thats my point. If nVidia's new architecture infact does not require an increase in bandwith, like the other IHVs, to feed nothing more than a brute-force architecture thats just more parallelization and concurrency - then why design it around something thats not necessary at this point?

But if you opt for a 128bit bus that’s it – you can only seek faster RAM. If you go for a wider bus you can have both if its DDR-II capable, which ATI's is. Even then, if the board cost really are an issue (which I don’t think they are – 9700 non-pro will give us a good indication) you still have the further option of chopping it down to 128bit for other variants

True, and you have a point, but when the early stage development teams, or whatever conviened after the merger, sit down and dreram up what the architecture will encompass - why add a cost increasing feature thats not needed?

That is my point - you don't need to move to a 256-bit bus to have stellar preformance if you have a more intelligent architecture. People here have this mad infatuation with big numbers thats insane.

You appear to be arguing up a blind alley.

Hah! I'd have it no other way But then again, you see alot further into the alley than I do...

But DDR2 is not the fastest memory tech on planet Earth. 1T SRAM is faster, pure SRAM is faster still...

True, but Kirk hypes: DDRII would probobly be the fastest DRAM available, no? Doen't know of many 3D cards that use 256MBytes of SRAM

 

[T2k]

The whole idea is pointless, IMHO.
It's ridiculous, there's no reason to stuck w/ 128bit bus in the future - even if NV30 can surpass R300...

This comment is ridiculous. Their are ways of rendering which can minimize the necessary bandwith by a factor of upto 10. Even if they achieve only 40% of this and pursue this route, then a 256-bit bus would yeild NO improvement. Whats so hard to comprehend.

Ridiculous - just like yours.
Nobody talk about your rendering ways - I don't see if something faster is available (in terms of pricing, etc), why we should stay with the oldschool one and rather do some crazy optimizations only. Imagine when optimization and the faster bus are together: plenty of room to do something! But you'd say no, thanks - congratulations.
This idea is REALLY ridiculous for me.

All it would do is: a) add unnecessary costs, b) allow people like you to make a fool out of yourself by repeating and buying into nomenclature and not the actual technical merits.

And yours? All that would do is: slow down the evolution, generations.
Thanks for that.

Price - do you REALLY think NV30 will be cheaper than 9700? (Lets say old 128bit bus + DDRII)

SA's question on how many FPS can be drawn with 1 pixel pipline @ 500mhz if you could eliminate ineffeciency and overdraw was beautiful. The fact is, it could preform better - with a more consistent FPS - than an 8 or 16 pipelined monster thats clocked slower. Yet, people like you need to have bigger numbers... elegance is beauty, brute-force is not.

Interesting. Will NV now prefer the 'elegancy'? Wow. Totally contradict its history.

No, I don't need bigger numbers. As a high-end user, all I need is the competition -> contiguous evolution -> better and more sophisticated features and more useful products (for the almost the same price).
Just one example: I'm waiting for the VPU-based rendering plugins...

And your idea doesn't help this, IMHO.

Edit: some typos.

 

[Dave Baumann]

However, how efficient can be a 256 bit bus coupled with DDR-II memory mastered by 4 memory controller (with or without crossbar..)?
Every channel would access (but I'm not very confident on this, please correct me..) to 8 bytes (64 bit wide channel) x 4 (min burst) = 32 bytes, at time. Now..with stuff like 128 bits buffer and textures efficiency is gonna up...but I believe that is not a good granularity access at all for current and near future applications.

‘Efficiency’ doesn’t have to be left purely to the crossbar and ‘the gods’ you can control efficiency to some degree with caching – why do you think KYRO’s or P10’s tile sizes are the size they are? They caching the pixels to be optimal for their memory bus. Likewise your texture caches can also be optimal to make efficient use of the available memory bus.

Um, thats my point. If nVidia's new architecture infact does not require an increase in bandwith, like the other IHVs, to feed nothing more than a brute-force architecture thats just more parallelization and concurrency - then why design it around something thats not necessary at this point?

And that’s my point – if they are really going for 500Mhz DDR-II is it really ‘that much’ more efficient?

I’m sure NV30 will have some cool efficiency scheme, but at the moment you have one manufacturer with a wide bus and slower RAM and another with a smaller bus but (most probably) much faster RAM – they don’t really scream much in the way of difference in bandwidth, but they have both chosen different route for arriving there.

 

[Vince]

Ridiculous - just like yours.
Nobody talk about your rendering ways - I don't see if something faster is available (in terms of pricing, etc), why we should stay with the oldschool one and rather do some crazy optimizations only. Imagine when optimization and the faster bus are together: plenty of room to do something! But you'd say no, thanks - congratulations.
This idea is REALLY ridiculous for me.

Wow, your not comprehending this. What I'm saying is that architectural and computational effeciency can minimize the necessary bandwith requirements by several times. If your rendering and perhaps acessing only what you see - bus bandwith drops quite steeply.

Congradulations, you're basically saying that fundimentally changing how an IMR renders is somehow "old-school" when doing a brute-force doubling of the pin count for the memory bus is... let me guess... "new-school" or revolutiuonary? I find this quite an odd PoV.

And yours? All that would do is: slow down the evolution, generations. Thanks for that.

What? Slow down the evolution? The move from 128->256 bit bus is not an evolutiuon with a true future. Are they going to move to 512bit in a year? And then 1024bit the year after? And then 2048bit in 2005?

On the other hand, DDRII will evolve - and quite rapidly to provide ever increasing bandwith.. not just a one-time 2X increase. Lithograhy advances (Ram) quite abit faster than manufacturing (packaging) ability.

Interesting. Will NV now prefer the 'elegancy'? Wow. Totally contradict its history.

Times change, their no longer restricted by a legacy architecture, they've had an infusion of engineers with differing perspectives on the entire rendering 'pipeline' - I think it's possible.

 

[Vince]

Um, thats my point

And that’s my point

Wow, My Point = Dave's Point; Dave's Point = My Point = All is good.

If they are really going for 500Mhz DDR-II is it really ‘that much’ more efficient?

From an end-users Point-of-View (if this is true) then No. But, I can see why nVidia (especially if they designed the chip around a new rendering scheme) would attempt to keep the architecture/packaging to a minimum and rely on the quickly advancing DDRII parts to provide them with quicker access to their - hopefully exotic and effecient - architecture.

Good discussion, time for lunch