anexanhume
Veteran
Here's a shot of both die side by side (A8 vs. A9). Given a package estimated to be 10.5% larger, I've assumed the A9 is 10.5% larger as a scaling factor. In the image, the A8 is 505 by 624 pixels, or 315120 total pixels. The A9 is 595 by 602, or 358190 total pixels. A8 total pixels increased by 10.5% is 348207 total pixels, so we only need to scale 2.9% down for all comparisons.
(credit to iMacmatician for partitions on A9)
With that said:
A8 SRAM: 121 x 136 = 16456 pixels
A9 SRAM: 74 x 108 (x 0.971) = 7760 pixels (x total 2) = 15520 pixels
A8 L2: 45 x 73 = 3285 (x total 2) = 6570 pixels
A9 L2: 88 x 165 (x0.971) = 14098 pixels
So, it looks as though we're looking at 4MB SRAM again on A9 (with minimal scaling from process change) and 2MB L2 cache per CPU core on A9, up from 1MB on A8 and matching 2MB per core on A8X. Of course, there are several potential sources of error including die cutouts not equal relative to edge of the chip, as well as the 10.5% growth not being representative. There's also selection error in defining the edges of the L2 (less so on the L3 SRAM). I think these quantities are sufficiently close or far apart enough to justify the above conclusions though.
(credit to iMacmatician for partitions on A9)
With that said:
A8 SRAM: 121 x 136 = 16456 pixels
A9 SRAM: 74 x 108 (x 0.971) = 7760 pixels (x total 2) = 15520 pixels
A8 L2: 45 x 73 = 3285 (x total 2) = 6570 pixels
A9 L2: 88 x 165 (x0.971) = 14098 pixels
So, it looks as though we're looking at 4MB SRAM again on A9 (with minimal scaling from process change) and 2MB L2 cache per CPU core on A9, up from 1MB on A8 and matching 2MB per core on A8X. Of course, there are several potential sources of error including die cutouts not equal relative to edge of the chip, as well as the 10.5% growth not being representative. There's also selection error in defining the edges of the L2 (less so on the L3 SRAM). I think these quantities are sufficiently close or far apart enough to justify the above conclusions though.