Apple A10X SoC

Discussion in 'Mobile Devices and SoCs' started by iMacmatician, Jun 5, 2017.

  1. Blazkowicz

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    It hasn't failed entirely, it's just less common. Mainly, Android phones were a rat's nest Intel got out of, the competitors have low margins and a range of product that scales from low to high end (with Cortex A7, A53, A57 etc. and GPUs and radio bands) while Atom was basically one mid to high end CPU and that's all.
    Atom tablets with Android are much a thing though. Some people may even find value in a Windows/Android dual boot. Though most might cut that noise and go Windows only (because there's a ton of little arbitrary "legacy" software, or HDMI + keyb + mouse makes it a small Windows desktop when needed) or Android only (because all the tablet/phone software is there)

    There's no big strategy behind Android on x86 though. The * Trail and * Lake Atom chips simply are friendly enough to tablets as well as netbooks and "compute HDMI sticks" due to being SoCs with LPDDR and eMMC soldered on the motherboard. So random vendors make cheap tablets and both Microsoft and Google have had a policy of providing free as in beer OS to them.
     
  2. Entropy

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    A more diverse selection of bechmarks in Engadgets' review of the 10.5"
    Link
    Graphics performance looks nice. Would like to see performance under extended use.
     
  3. Ailuros

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    If you look at peak scores the A10X GPU achieves roughly =/< 2.0x A10 GPU performance, for which I'd speculate that both are clocked somewhere in the 630+MHz region. So the first now achieves roughly 120 fps in Manhattan3.0 and roughly 80+ fps in 3.1 (always offscreen), what exactly for? Still no support even in software for anything >OGL_ES3.0 and I truly wonder what their policy will be with their own future GPUs regarding featureset/capabilities. A thought that they'll stick forever to anything ES3.0/DX10.0 doesn't make sense; my gut feeling would tell me that they might opt for their own solution for capabilities like tessellation down the line.

    Either way and while I understand that those monster tablets are aiminig to compete with Microsoft's Surface solutions, they still seem overpowered considering their GPU. For the extended use or any possible throttling I wouldn't expect any significant differences to the A10 behaviour in a tiny smartphone device. Depending on surrounding temperatures it should also throttle somewhere in the 20-30% ballpark after very heavy GPU stress scenarios.
     
  4. mfaisalkemal

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    i think apple graphic power of A9X soc is over 500GFLOPS (based on this event at 50:45) or clocked around 666MHz.

    So it safe to assume graphic power of A10X is over 700GLFOPS(40% Better) or around 933MHz.
    And if we compare iPad Air and iPad Pro 10.5 score GFXBenchmark Manhattan Offscreen is 13fps(http://www.anandtech.com/show/8666/the-apple-ipad-air-2-review/4) vs 109fps(https://www.engadget.com/2017/06/12/apple-ipad-pro-10-5-review/) there is 8 times improvement over 3 years(2 times per years).
    It will be amazing if next year iPad Pro have 2 times graphics power again(not far from graphics power Nvidia GTX 950 at fanless form factor!!!)
     
    #24 mfaisalkemal, Jun 16, 2017
    Last edited by a moderator: Jun 16, 2017
  5. Voxilla

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    The GFXBenchmark Manhattan Offscreen for iPad Air2 released in 2014 is 32.6 fps, so that's ~3 times faster in 3 years.
     
  6. Ailuros

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    I said FP32; now go back to the slide claim and guarantee that whatever he claims is actually FP32 and yes the frequency of the A9X is more in the =/<450MHz region than anything else. If they'd clock as high as 666 and 933MHz for A9X & A10X respectively it actually speaks against the notion of going as wide as with the cluster count in the first place.
     
  7. mfaisalkemal

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    what about if i use PowerVR 7400XT+ on Mediatek Helio X30 as a comparison?
    [​IMG]
    (Source: http://www.fudzilla.com/news/mobile/43246-mediatek-helio-x30-scores-5750-in-geekbench)
    PowerVR 7400XT+ @ 800MHz = 204,8 GFLOPS FP32
    Manhattan Offscreen = 40fps
    if i multiply 3 times because of 12 clusters on A10x i got score = 120fps
    but wait, adding more clusters maybe not 100% linear so increase clocked from 800MHz to 933MHz i think make sense.
     
  8. mfaisalkemal

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    and this is some low level data tests of iPhone 7+ from old GFXBench(GFXBench 2.7.3 and GFXBench 3.0.3).
    [​IMG]
    [​IMG]
    For alu off screen score A10Fusion is above Tegra K1 Nvidia Shield Tablet(288GFLOPS FP32 @ 750MHz)
    304.8fps vs 269.9fps.
    From fill rate off screen score if we divide 10972MTexel/s / 12(Texture Unit of PowerVR GT7600) is above 900MHz.
    We can double score for A10X
    If we look triangle throughtput of A10Fusion compare to A7(Iphone 5s) ~ 10 times improvement.
    [​IMG] [​IMG]
    (Source: http://www.anandtech.com/show/7335/the-iphone-5s-review/7)
     
  9. Ailuros

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    Different platforms, different bandwitdth, implementation and Lord knows what else; the Apple A9 GPU with 6 clusters gets about the same Manhattan result https://gfxbench.com/device.jsp?benchmark=gfx40&os=iOS&api=metal&cpu-arch=ARM&hwtype=GPU&hwname=Apple Inc. Apple A9 GPU&did=47911228&D=Apple iPad 9.7 (5th Gen) at less FLOPs (if memory serves well the frequency there was at somewhere 450-460MHz).
     
    #29 Ailuros, Jun 24, 2017
    Last edited: Jun 24, 2017
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  10. Ailuros

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    Keep on comparing Apples to oranges and you've probably only convinced yourself with that quote orgy. Just as an advise fillrate results are HIGHLY misleading for a long time now in gfxbench since it doesn't represent anything like TMU amount * frequency = fillrate because the latest tests use too much alpha blending from what I recall. Last but not least the K1 GPU peak frequency is higher than 750MHz.
     
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  11. Nebuchadnezzar

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    Round up those figures and you're close to the real clocks. His analysis is largely correct.
    Which isn't being used in battery powered devices.
     
  12. Entropy

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    Have any of you gentlemen any accurate information on process node (or even die size which could be used to infer process node).
    I haven't found anything on the web. The iFixit crew didn't measure the die for instance, no info from TSMC sources, nothing from the Chipworks guys either.
     
  13. Nebuchadnezzar

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    Nothing concrete either, but this all points out to it still being 16nm. We would have heard something if it was 10nm. The 10FF silicon I've seen till now was very disappointing, seems like a replay of the 20SoC story.
     
  14. kabraham2

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    Hi,

    I think I found a way to estimate die area,
    Using ifixit's X-ray shots and doing some image enhancement, I can see a slightly darker square within the A10X package, which I assume is the die.
    It's kind of hard to see, especially the upper boundary is not clear, but what I measured tuns out at 44x46 pixels, and, using the dimensions of the Ipad as a reference, this results in about 95mm2.
    I tried the same thing on the A9X, and it works out to 12x12.3 mm2, which - even if only by chance - is accurate to the mm2 to the 147mm2 that chipworks measured.
    The 9.7in iPad pro x-ray does have better contrast, and there is no apple logo in the way, so i am less confident here than i am there, but even if it is only a ballpark number, it would tell me that the chip is almost certainly manufactured on 10FF.
    The last time apple encountered a 'disappointing' node, they increased core count with only minimal frequency increase, and the A10X does the same thing. So maybe 10FF once again doesn't scale well with frequency? Lots of speculation.
    (and yes, i have been a silent reader for many years, this was the first time i thought i could contribute something productive, so i signed up) Screen Shot 2017-06-28 at 10.15.56 AM.png
     
  15. Nebuchadnezzar

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    10FF is only supposed to be 20% faster at same power.
     
  16. Entropy

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    Thanks for your effort kabraham2, much appreciated!
    If your estimates are even ballpark correct, I agree it pretty conclusively points to 10nmFF. The wider design and much larger cache can be accomodated by 10nm, because as Nebuchadnezzar points out, the boost in frequency at ISO power is relatively modest, wheras the savings in power at ISO frequency is larger, and of course density improves by approximately a factor of two.
    It is still a very good result on the process, if we assume roughly the same power consumtion, which seems reasonable since the 10.5" model doesn't seem downclocked relative to it's 12.9" sibling, unlike the A9x, and battery life is pretty much equivalent.
     
    #36 Entropy, Jun 28, 2017
    Last edited: Jun 28, 2017
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  17. iMacmatician

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    Great observation!

    I wonder if the third digit of the "APLxxxx" number of the TSMC chips denotes process node. So far, using Wikipedia's Apple processor list* as reference, the TSMC chips are as follows:
    * Wikipedia says 16 nm for the A10X, but I do not think the cited source is reliable.

    A8 — APL1011 — 20 nm
    A8X — APL1012 — 20 nm
    A9X — APL1021 — 16 nm
    A9 — APL1022 — 16 nm
    T1 — APL1023 — [Unknown]
    A10 — APL1W24 – 16 nm
    A10X — APL1071 – 10 nm

    So perhaps 1 implies 20 nm, 2 implies 16 nm, and 7 implies 10 nm? I don't know why the number jumps from 2 to 7, but presumably if some future chip number has a first digit of 1 (which seems to mean TSMC) and a third digit of something other than 1, 2, or 7, then that would be a sign of a new process node.

    Also, could Apple be using the A10X as a pipe cleaner for 10 nm?
     
  18. Entropy

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    In a sense, since the iPhone SoC (A11 presumably) is more critical both in terms of yields and timing to market.
    It's a rather complex and high performance chip for a pipe cleaner though.
     
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  19. kabraham2

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    Maybe the number is the tapeout cost, in Billions? :p

    As for the 'pipe cleaner' for 10nm, I think it is more than that, given that geek bench does regress in some areas, I suspect this is actually the next Architecture (Monsoon? Apple is kind of running out of tropical storm names).
    A delayed iPad is bad, but a delayed iPhone is much worse, so i suspect they wanted to make sure there really are no issues with their next technology before risking a delay to the iPhone.
    I would also be interested in seeing those cache latency tests anandtech does, 8MB is huge, and Hurricane had the cache really neatly in two pockets between the cores, going to three has to increase the distance to the cores.
     
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  20. Nebuchadnezzar

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    That's not how it's laid out. Here:

    [​IMG]
    A10 on the left, A9 on the right.

    The distance to the cores isn't what matters, the L2 banks connect to the L2 arbitration in the middle.
     
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