Hi everyone. Fir ling tume I want to know answer for quedtion about Iphone chips. In 2015 I bought Iphone 6 Plus, release was in september 2014. SOC had 2 billion transistors and that was ~ half of ps4 SOC. Now Apple released Iphone 15 Pro. New chip have 19 billion transistors and that is akmost twice as PS5 chip. But performance is not even near. If info from internet is correct Iphone 15 Pro have 3.5 Tflops. The question is why Iphone chips have so many transistors if performace is a lot lower than in chips with less transistors in consoles, or even PC?
Iphone SOC
- Thread starter Liandry
- Start date
When you're talking about performance do you mean graphics performance, right ?
Mobile SoCs generally have to be clocked lower and paired with lower memory bandwidth to meet tight power budgets on small devices while consoles can be clocked much higher and can be coupled with a higher performance memory interfaces. Also console/PC centric games are optimized for graphics architectures found on consoles/PC which is somewhat different to the graphics architectures you'd see on mobile SoCs. Despite some mobile SoCs out there eclipsing consoles in terms of logic complexity, a combination of those factors places stringent limits to graphics performance they can achieve ...
Mobile SoCs generally have to be clocked lower and paired with lower memory bandwidth to meet tight power budgets on small devices while consoles can be clocked much higher and can be coupled with a higher performance memory interfaces. Also console/PC centric games are optimized for graphics architectures found on consoles/PC which is somewhat different to the graphics architectures you'd see on mobile SoCs. Despite some mobile SoCs out there eclipsing consoles in terms of logic complexity, a combination of those factors places stringent limits to graphics performance they can achieve ...
Don't the phone SOCs also have a lot of silicon for non-gaming uses?
I think these are die shots of A15 and XBSX. Not to scale:
GPU is a tiny fraction of the mobile SOC whereas a huge chunk of the console SOC. So you have less transistors for GPU, maybe CPU also, and clocked far lower, and tied to far slower RAM. Peak TFlops can come from non-gaming maths, like optical recognition or whatever these things do these days. Hence not a 1:1 comparison of performance.
I think these are die shots of A15 and XBSX. Not to scale:
GPU is a tiny fraction of the mobile SOC whereas a huge chunk of the console SOC. So you have less transistors for GPU, maybe CPU also, and clocked far lower, and tied to far slower RAM. Peak TFlops can come from non-gaming maths, like optical recognition or whatever these things do these days. Hence not a 1:1 comparison of performance.
cheapchips
Veteran
The SoC consists of many other things like the Secure Enclave, System Level Cache, Media engine, Display engine, various I/O (USB, PCIe etc), gyroscope, GPS, eSIM, NAND flash controller, camera input / output, Tread radio etc. etc.
Just like a computer is more than just the processor, graphic card, storage and RAM.
Questionable whether these things would be on the SoC. The gyro in particular, AFAIK those things are MEMS.
DavidGraham
Veteran
Apple beat Intel and AMD by being so much wider, thus needing a lot more transistor count than Intel and AMD.
They made a choice of going very wide and very deep at the expense of a lower maximum operating frequency. The higher cycle times allows them to build structures that are wider and deeper. They can have longer buses, larger SRAM arrays with the longer cycle time; 8 wide decode, 630+ entry ROB, 16 execution units (each with its own scheduler), 192Kb I-cache and a 128KB D-cache with 3 cycles load-to-use latency is all made possible by the longer cycle time. All of this increased their transistor count tremendously, you can't compare it to X86 based APUs.
They made a choice of going very wide and very deep at the expense of a lower maximum operating frequency. The higher cycle times allows them to build structures that are wider and deeper. They can have longer buses, larger SRAM arrays with the longer cycle time; 8 wide decode, 630+ entry ROB, 16 execution units (each with its own scheduler), 192Kb I-cache and a 128KB D-cache with 3 cycles load-to-use latency is all made possible by the longer cycle time. All of this increased their transistor count tremendously, you can't compare it to X86 based APUs.
As I know AMD have CPU with 1MB L1 cache.
Is it per core or for all 6 cores?
DavidGraham
Veteran
1MB L1 combined for all cores I am sure. Which CPU though?
Per core of course. Comparatively speaking, M1 had 6x times larger L1 caches than 2020/2021 x86 designs.
This was all explained by Anandtech.
DavidGraham
Veteran
This one has 64KB L1 Cache per core. For a total of 1MB L1 Cache.
Ok, thanks for that explanation!
DavidGraham
Veteran
Thinking about it more. Seems the M2 still enjoys a large lead in cache capacity even vs new X86 CPUs.
7950X:
L1: 64KB per core (1MB total)
L2: 1MB per core (16MB total)
L3: 64MB total
M2 Max:
L1: 192KB + 128KB per core (3.2MB total)
L2: 32MB performance cores + 4MB efficiency cores (36MB total)
L3: 48MB total
M2 Ultra: double everything of M2 Max
L1: 6.4MB
L2: 72MB
L3: 96MB
Last edited:
