AMD: Volcanic Islands R1100/1200 (8***/9*** series) Speculation/ Rumour Thread

Blazkowicz said:
Yes I think a 16GB model is a certainty now, I didn't want to speculate too much about it but that makes a nice high margin, desirable card.
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In addition, i hope they have advance on the support of "true functions call" " for kernel compiler" ) ( I base myself on the OpenCL Kernel for Blender ).. I still dont know if the issue is on the OpenCL side, Blender, or AMD... on some other program, you dont hit the same problem it seems. ( Maya, Marri etc ). This could potentially quickly increase the adoption of OpenCL in Blender.

( Damn, hard to explain for me in english )
 
Cost(s) for 512bit vs 384bit bus?

How much more expensive (to AMD/Nvidia/Whoever) is a 512bit bus vs 384bit bus?

In olden times when Nvidia had 512 bit bus I remember posts here saying that the PCB had to have more layers for routing which added cost and that the extra pins on the GPU itself added to the cost.

Also if there are any other costs associated with the wider bus please state what they are.

So any ideas as to how much, in percent, it costs to go to a 512 bit bus from a 384 bit bus?
 
Perhaps not that many, my guess is less than 10%.

Anyway, the chip itself costs probably also 15- 20% of the total final price of the videocard, so the increase should be negligible from that point of view.
 
A1xLLcqAgt0qc2RyMz0y said:
How much more expensive (to AMD/Nvidia/Whoever) is a 512bit bus vs 384bit bus?

In olden times when Nvidia had 512 bit bus I remember posts here saying that the PCB had to have more layers for routing which added cost and that the extra pins on the GPU itself added to the cost.

Also if there are any other costs associated with the wider bus please state what they are.

So any ideas as to how much, in percent, it costs to go to a 512 bit bus from a 384 bit bus?
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A wider bus means a more complex PCB and more memory chips. But in this case the die is also smaller because the PHYs are slower and smaller, and it probably saves some power too. The relatively slow GDDR5 chips may be slightly cheaper, but I doubt it's very significant.

Even after factoring in the smaller die, I think the net effect must still be an increase in cost, but I have no idea by how much. It seems to me that AMD decided to trade some cost for power-efficiency, which is a common trend these days. I would say that NVIDIA's decision to drop hot clocks in Kepler follows the same rationale.
 
Wynix said:
If the leaked benches are real then perhaps they have improved the drivers? Those leaks place it roughly equal to Titan and not clearly above it.
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Not too sure about this info and certainly not trying to add to any hype, mainly because Hawaii trading blows with Titan seems reasonable, but hints were dropped that the benches were for the Pro, not XT.
 
Alexko said:
A wider bus means a more complex PCB and more memory chips. But in this case the die is also smaller because the PHYs are slower and smaller, and it probably saves some power too. The relatively slow GDDR5 chips may be slightly cheaper, but I doubt it's very significant.
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I think Dave also mentioned for either Cayman or Tahiti (ie a long time ago) that the high speed of the gddr5 also added significantly to the board complexity/cost. It's ofcourse not only the chip that will be smaller/simpler per pin at lower speed.
 
wouldn't it be hard to make dual cards with 512 bit bus? I thought AMD wanted to target the "ultra enthusiasts" with $1000 dual gpus based on hawaii.
 
Esrever said:
wouldn't it be hard to make dual cards with 512 bit bus? I thought AMD wanted to target the "ultra enthusiasts" with $1000 dual gpus based on hawaii.
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It is probably better for them to skip it this series and bring it out next series at 20nm due to lower power/heat.
 
LordEC911 said:
Not too sure about this info and certainly not trying to add to any hype, mainly because Hawaii trading blows with Titan seems reasonable, but hints were dropped that the benches were for the Pro, not XT.
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Im on the same boat, but there's something i find strange in the spec who have been given by Dice and expreview: The 11 CU - 44ROPs..

- I cant remember when AMD have use a impair number for CU.. i ask me if we can have 1CU disabled there. So on the end, maybe ( i insist on maybe ) 12CU with 4 SMID each, 48 ROPs. (12x [4x64] = 3072 SP )

The second thing is the clock they was given: 800mhz / 1020mhz Turboclock.
- This look more than extremely strange. In general the turbo clock will run around 50-100mhz more.. not 220mhz more. So i can imagine they have 1) a second bios fully enabled, or not even the right bios with the right clock speed.

They have maybe just need do this choice. but 1CU disabledcan look like it is a pro model ( and explain thoses numbers ).

Understand me, i put a big big " maybe " to what i have write, for me a 11CU could be allready largely enough good. Depending the clock the card should not be far of 6 Tflops SP...

Anyway, we will know it enough soon.
 
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Anyway, after what we have seen for Hynix Fab.. Does this can imply a slower production and so less chips available ?

I know GDDR market is far different of the DDR one in term of quantities ( its not really like outside nvidia and AMD there's much client )
 
Wynix said:
Looks like a tweaked 7870 with boost.
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If R9-290X is 12CUs this R7-270X will be what? 5CUs?. If the Volcanic islands arrangement is like this in Curacao then we know PS4 has not Curacao inside as it is a 18 CU architecture. But it has no sense for Sony not to have gone with a more efficient version of GCN.

Well let´s see today the hightlights of Hawaii.
 
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lanek said:
Im on the same boat, but there's something i find strange in the spec who have been given by Dice and expreview: The 11 CU - 44ROPs..

- I cant remember when AMD have use a impair number for CU.. i ask me if we can have 1CU disabled there. So on the end, maybe ( i insist on maybe ) 12CU with 4 SMID each, 48 ROPs. (12x [4x64] = 3072 SP )
.
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Where did you heard that? I can't find it on the expreview page.

The current architecture for a CU is 4 SIMD 16-way wide, for a total of 64 ALUs per CU.
The change you are suggesting is a huge one (SIMD 64-way wide) and not likely at all.

I think there is a lot of confusion because recently AMD changed the naming for the GNC architecture.

For example, here:

Update - The fully enabled Hawaii die features 4 CUs (Compute Units), each CU has 11 SMIDs which amount to 44 SMIDS results in 2816 stream processor count, 176 Texture mapping Units, 44 Raster Operators.
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which is saying, in GNC 1.0 naming scheme, that Hawaii has 4 groups of 11 CUs, each CU has 4 SIMD, 16-way wide, for a totale of 2816 ALUs
 
MarkoIt said:
Where did you heard that? I can't find it on the expreview page.

The current architecture for a CU is 4 SIMD 16-way wide, for a total of 64 ALUs per CU.
The change you are suggesting is a huge one (SIMD 64-way wide) and not likely at all.

I think there is a lot of confusion because recently AMD changed the naming for the GNC architecture.

For example, here:



which is saying, in GNC 1.0 naming scheme, that Hawaii has 4 groups of 11 CUs, each CU has 4 SIMD, 16-way wide, for a totale of 2816 ALUs
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That has more sense, even thinking about redundacies.
 
if its the 7750 replacement.. its not bad at all.. But we have not much benchmark information.. a perf/w ratio at 1600p... a 1080p performance ratio...

Lol forget my post, look like i was not really wake up ..

Thaiti




One GCN CU:

(Anandtech schema )
 
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AnarchX said:
btw.
Curacao also got tested: http://wccftech.com/amd-curacao-pro...phics-card-benchmarked-faster-radeon-hd-7870/
Not really clear which SKU, likely R9-270X
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It's written R7 270 without the X which means the Pro version

Wynix said:
Looks like a tweaked 7870 with boost
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Anyway, a relatively weak performance result, me thinks :???:

x0phcn.jpg


Psycho said:
If the Pro version is 8% faster than 7870 it's not a Pitcain
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Of course it is not or you point out something else? :???:
 
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