AMD: Volcanic Islands R1100/1200 (8***/9*** series) Speculation/ Rumour Thread

[3dilettante]

It's strange. One would think that any competitor or organization AMD has to worry about would have already taken a grinder/acid to a chip and looked at it, so would being secretive about it (edit: if it were true) matter?

I suppose it is a bit much to ask someone on the internet to take one for the team.

 

[lanek]

http://www.apple.com/imac-with-retina/
3.5 TF compute power - 2048@854mhz? sounds reasonable for "mobile" downclock.

this one says 4gb memory, which points more to 256 bit than 384, so no extra evidence for the 384bit/48rop Tonga.

Nothing much that what have been used in laptop thoses las years.

I still ask me how relevant is a 5K monitors from Dell with this configuration vs a 4K with this hardware under the box. outside marketing ofc ... ((( I should say a 1808p monitors as this hardware are just besting there )

 

[Grall]

I was under the understanding the 384bit bus is confirmed.

If it actually existed, I think you would find it in a graphics solution intended to drive a friggin 5K rez screen...

 

[dbz]

If it actually existed, I think you would find it in a graphics solution intended to drive a friggin 5K rez screen...

Even if Tonga was 384-bit the MXM standard calls for a maximum of 256-bit does it not?

 

[lanek]

Even if Tonga was 384-bit the MXM standard calls for a maximum of 256-bit does it not?

Tonga have never been designed for be more of what it is... a middle range gpu's declassed from Hawaii, like was the 7870 vs 7970... ofc it seems some parts are disabled, maybe on inititial plan it should have an XT released.. but looking at the impact on the market have dont the intitial Tonga, i suspect the decision to dont go further, and work on the next generation have been taken really fast ...

 

[Grall]

Even if Tonga was 384-bit the MXM standard calls for a maximum of 256-bit does it not?

Apple doesn't use MXMs in their computers anymore. Anyhow, I don't see why the MXM standard would micromanage architectural details of that sort, it ought to be concerned about things like thermal, mechanical and electrical properties and dimensions only.

 

[Silent_Buddha]

Apple doesn't use MXMs in their computers anymore. Anyhow, I don't see why the MXM standard would micromanage architectural details of that sort, it ought to be concerned about things like thermal, mechanical and electrical properties and dimensions only.

There's only a limited amount of pins that can be supported. Hence, each version of MXM has a maximum bandwidth available for memory interface.

According to wikipedia, at least, 256 bit is the highest available currently.

Regards,
SB

 

[homerdog]

Ah yes, Tonga does have a 384bit memory bus.
http://www.techpowerup.com/205811/amd-tonga-silicon-features-384-bit-wide-memory-interface.html
http://www.techpowerup.com/img/14-09-30/141a.jpg

Original source:
http://pc.watch.impress.co.jp/docs/column/kaigai/20140926_668620.html
http://pc.watch.impress.co.jp/img/pcw/docs/668/620/html/01.png.html

It baffles me why they haven't released a full Tonga part yet. It may not equal Maxwell efficiency but it surely would be better than what they currently have to offer.

 

[silent_guy]

There's only a limited amount of pins that can be supported. Hence, each version of MXM has a maximum bandwidth available for memory interface. According to wikipedia, at least, 256 bit is the highest available currently. Regards, SB

Are you sure about that? I thought MXM modules had the DRAMs in the module itself. It'd be madness to route a fast DRAM bus through such a connector.

Edit: a google for MXM shows DRAMs on the module. So the connector isn't the issue.

 

[mczak]

I was under the understanding the 384bit bus is confirmed. I recall reading it from a very reliable source, but now it escapes me.

Nope. There was some amd presentation (that's the stuff from japan) where whoever did the writeup afterwards was convinced it was 384bit for some reason. But it doesn't look like the presentation itself confirmed that directly.
And the diagrams drawn from it were just homegrown like everybody else's, so just mirroring what the guy doing them thinking it looked like...
At least it was not enough to convince me back then really...

 

[Silent_Buddha]

Are you sure about that? I thought MXM modules had the DRAMs in the module itself. It'd be madness to route a fast DRAM bus through such a connector.

Edit: a google for MXM shows DRAMs on the module. So the connector isn't the issue.

Then I'm actually not sure why the limitation is there for the MXM standard. Perhaps not all MXM GPUs use dedicated memory? No clue really.

Regards,
SB

 

[Deleted member 13524]

Then I'm actually not sure why the limitation is there for the MXM standard. Perhaps not all MXM GPUs use dedicated memory? No clue really.

Regards,
SB

Even if there were MXM graphics cards without dedicated, MXM is just PCI-Express with smaller pins. The acronym actually means "Mobile pci-eXpress Module".
Looking at the table you mentioned, I'm guessing those are just guidelines for the power consumption class of the mobile graphics cards that go into each type of socket.

 

[Alexko]

The latest version of AMD's CodeXL finally clarifies the nomenclature:

The first version of GCN, introduced by Tahiti, is called Graphics IP v6.
Then Bonaire/Hawaii = GIP 7
And Iceland = GIP 8; presumably, Tonga should be in this category as well, but for some reason it's missing entirely.

Now the big question is whether Fiji is GIP 8 or 9.

 

[Ryan Smith]

Well that's not nearly as fun as Graphics Core Next. It's so generic that I expect some people will have a hard time remembering the differences between various versions.

 

[Alexko]

I guess Graphics Core Next is the marketing name and Graphics IP levels are for developers. But you could also consider that:

GCN 1.0 = GIP 6
GCN 1.1 = GIP 7
GCN 1.2 = GIP 8

In fact, that's probably more readable, because I'm not sure I'd be able to remember those IP levels.

 

[pTmdfx]

I guess Graphics Core Next is the marketing name and Graphics IP levels are for developers. But you could also consider that:

GCN 1.0 = GIP 6
GCN 1.1 = GIP 7
GCN 1.2 = GIP 8

In fact, that's probably more readable, because I'm not sure I'd be able to remember those IP levels.

The internal numbering scheme described in the Linux open source driver (drm-radeon IIRC, or else amdkfd) is pretty much like this. The Graphics Core Next architecture was called GFXIP 7.0, while the later revision with flat addressing support (device and system unified addressing in some "CI" and "VI" chips) was called GFXIP 7.1. The upcoming one with compute context switch could be named GFXIP 7.2 internally, but I am not so sure. It is also possible that the new scheme in your post also replaced the aforementioned one for internal uses.

 

[Osamar]

Communication among departments about graphics, will seem a Marx Brothers scene

 

[Dave Baumann]

The internal numbering scheme described in the Linux open source driver (drm-radeon IIRC, or else amdkfd) is pretty much like this. The Graphics Core Next architecture was called GFXIP 7.0, while the later revision with flat addressing support (device and system unified addressing in some "CI" and "VI" chips) was called GFXIP 7.1. The upcoming one with compute context switch could be named GFXIP 7.2 internally, but I am not so sure. It is also possible that the new scheme in your post also replaced the aforementioned one for internal uses.

The dots are usually minor revisions and/or implementation specific features (i.e. an APU might have full power gating in the graphics core where a dGPU wouldn't).

 

[iMacmatician]

From Sweclockers: "AMD Introduces Radeon R9 290X with 8 GB of video memory in November" (original).

There's also a rumor of a 8 GB GTX 980. Maybe it'll be the battle of the 8 GB (consumer) GPUs at the end of this year?

 

[eastmen]

Makes sense with the xbox one having 4 or 5 gigs of ram avalible for 900p they are going to want to start offering more ram in the cards