AMD: Pirate Islands (R* 3** series) Speculation/Rumor Thread

Now we need to see the image of aircooled version which will be guarded much stronger. AMD will want to promote fancy-er card first. :D
 
Well, now I'm shocked by how much interposer is "going to waste". Dare say it looks more like 19 x 22mm. Error margin in die area is well over 10%, I suppose, which is arguably more than the area that might be saved in PHY going from GDDR5 to HBM :oops:

Maybe it's some sort of RV770 like magic that they manage to cram so much performance into a die that's about the same size as Hawaii. (Tonga, against Tahiti perhaps, is indicative of gains in transistor density per mm² - some of which would be helped though by Tonga's smaller and slower GDDR5 bus.)

EDIT: pixel counting on this image indicates to me that the "height" of the interposer featured there is only 23mm. This is based on the 107 pixel length of the HBM, which is 7.3mm. The GPU height appears to be 21mm.

2nd EDIT: (sorry, got distracted by a 918 v P1 argument), if the interposer is 32mm wide, then the GPU can be 20mm. Widthwise, the distance from GPU edge to interposer edge appears to be precisely 6mm.

So as far as I can tell, Fiji is no more than 21 x 20mm = 420mm².

VZ and WCC have done their own calculations, far different result.. this said i have absolutely not check their methods .

http://wccftech.com/amd-fiji-die-reconstructed-hbms-huge-gpu-uncovered/

http://videocardz.com/55561/editorial-how-big-is-fiji

AMD-Fiji-Graphics-Processors.jpg


11286625_10153897202717788_737087796_o.jpg
 
I will have said Halt control fan.. switch fan profile of the h2o to full speed.. but im a sad panda, dont have the gpu now.
 
The new MacBook Pro with retina display just launched today with the R9 M370X, with support for an external 5K display at 60Hz.

Does this breath fire to the old rumour that R9 MX370X is based on Litho XT and not Oland? Well, could just be Cape Verde ...

It is just Cape Verde with DDR5. GCN 1.0, released back in 2012 ...
 
Note that it's 5120 x 2160, not 2880. So it's not quite support for 5K, it's support for a 21:9 stretch 4K monitor, like what LG has been doing.

Turns out that was a typo, it now says
  • Native Mini DisplayPort output
  • DVI, VGA, dual-link DVI, and HDMI output supported using Mini DisplayPort adapters (sold separately)
  • Support for up to 5120-by-2880 resolution at 60Hz on a single external display (model with AMD Radeon R9 M370X only)
 
So it looks like there's an awful lot of wasted interposer space. It really makes you wonder why AMD didn't put all four stacks on the same side, at the expensive of some extra height.
 
If UMC can make interposers larger than 32 x 26mm, then those Fiji die sizes are possible.

WCCF has taken VC's work as far as I can tell and tried to be more accurate. He failed at the first hurdle, stating that the HBM chip is 5mm wide. It's 5.5mm wide. That's a 9% error. That's enough for 2mm of error in the width. He states 21-23mm and I think it's 20mm.

As for the height, I haven't seen most of the source images that VC used so I don't have numbers derived from them. If we take the 26-28mm estimate and adjust for the 9% error, we get 24.5mm.

20 x 24.5 = 491mm².

And all of these numbers (mine, included, from earlier posts) ignore packaging related dimensions. The GPU die is smaller.
 
So it looks like there's an awful lot of wasted interposer space. It really makes you wonder why AMD didn't put all four stacks on the same side, at the expensive of some extra height.

You need the tracing for the PHY and TSV .. i imagine you have one on a side and the other who come on the other side of the memory package chip, hence why this configuration. Due to the nature of the interposer, i imagine you have too a bit of redundancy on thoses tracing inside the interposer.

it seems all tracing are at the same level, tomorrow, i can imagine the interposer could be made with multiple layers for the tracing.

Seriously, im amazed by all the engineer work and things who have need to be solved for get HBM... so i somewhat trust the work who have been made. The interposer, the TSV's, etc.. On this aspect, i like a lot the Anand article who take everything point by point.
 
Last edited:
Also moving the data from one side of the chip to the other, that is closest to the HBM stacks, wastes additional power.
Locality, locality, locality. If you need to move something you want to move it the least possible distance.
 
One hypothetical reason why AMD might want to keep that silicon is that the interposer doesn't necessarily need to only provide connections solely at the periphery of a large chip and memory. There is research that may very well not come to anything where the higher wiring density can be used to create an additional network on the package, although the proposal relies on bump pitches finer than HBM does.

http://www.eecg.toronto.edu/~enright/micro14-interposer.pdf
That was pretty interesting. I dare say it's hard to argue with it, since distinct topologies clearly favour a variety of workloads and peer-types. As a way to cut back on metal layers in the logic die it seems pretty much perfect, if you are going to use an interposer anyway. So really it boils down to the costs and limitations of interposers.

They talk about a 36 x 24mm interposer, which is radically larger than we've been discussing. That increase in width could put Fiji well over 500mm².

In the PDF from Xilinx I linked earlier, there's talk of a technology call SLIT (Silicon-less Interconnect Technology). This is potentially a large saving on interposer costs, because it has no TSVs.

http://electroiq.com/insights-from-...-215-stats-acquisition-will-slit-replace-tsv/
 
WCCF has taken VC's work as far as I can tell and tried to be more accurate. He failed at the first hurdle, stating that the HBM chip is 5mm wide. It's 5.5mm wide. That's a 9% error. That's enough for 2mm of error in the width. He states 21-23mm and I think it's 20mm.
It should be the other way. The HBM real width is larger than the HBM rounded width, so the real Fiji width should also be larger than the estimated Fiji width.

According to this PDF (page 13), a HBM Gen 1 module is 5.48 mm x 7.29 mm ( ± 25 µm each).

WCCFTech's calculation is as follows:

Because we know an HBM stack is exactly 5mm wide. We went through AMD’s official rendering and measured the width pixel by pixel. And we arrived at exactly 21mm.
[…]
We know for a fact that Fiji is at least 26mm long, this is again by using HBM’s length, which we know to be 7mm, as a measuring stick.
So finally, we arrive at GPU die size range of 546mm² to 588mm² based on a fixed width of 21mm and possible lengths ranging from 26mm to 28mm.
So using the 5.48 mm x 7.29 mm numbers, we get a width of "exactly" 23.0 mm and lengths from 27.1 mm to 29.2 mm. Then the range of die sizes are from 623 mm^2 to 671 mm^2. (You can also use the real and rounded areas of the HBM stacks, 39.9 mm^2 and 35 mm^2 respectively, take their quotient, and multiply that by each of WCCFTech's estimates. So 567 mm^2 x (39.9/35) = 647 mm^2.)

Videocardz's calculation is harder to correct because they appear to be using a 5 mm x 7 mm box as their measuring tool and they have thick borders around the relevant elements in their collage. I can only get a very rough estimate of ~ 637 mm^2.
 
It should be the other way. The HBM real width is larger than the HBM rounded width, so the real Fiji width should also be larger than the estimated Fiji width.
I'm sorry, you're absolutely right. I saw the 9% error and didn't even stop to think about the sign :oops:

According to this PDF (page 13), a HBM Gen 1 module is 5.48 mm x 7.29 mm ( ± 25 µm each).
Yes, those are the dimensions I have been using.

WCCFTech's calculation is as follows:

So using the 5.48 mm x 7.29 mm numbers, we get a width of "exactly" 23.0 mm and lengths from 27.1 mm to 29.2 mm. Then the range of die sizes are from 623 mm^2 to 671 mm^2. (You can also use the real and rounded areas of the HBM stacks, 39.9 mm^2 and 35 mm^2 respectively, take their quotient, and multiply that by each of WCCFTech's estimates. So 567 mm^2 x (39.9/35) = 647 mm^2.)

Videocardz's calculation is harder to correct because they appear to be using a 5 mm x 7 mm box as their measuring tool and they have thick borders around the relevant elements in their collage. I can only get a very rough estimate of ~ 637 mm^2.
My problem with both sites' numbers is that they've both ignored the possible size of an interposer.

But since I wrote my criticism of their numbers in post 1092, I've realised two things:
  1. AMD itself seems to be under the impression that an interposer can be 36 x 24mm. Simply by allowing 12mm for the gaps around the HBM, the GPU can be 24mm wide. Hence my comment in post 1097 that the GPU could be over 500mm². I had used 32mm as the maximum width earlier, which is why I suggested it could be 20mm wide.
  2. I ignored the possibility that the spacing of the HBMs along each edge are asymmetric, therefore my height estimate was too low. The collage even shows this, but I ignored it.
If you take the maximum size of the interposer as being 36 x 24mm, then I think the maximum GPU die size is 24 x 23mm = 552mm². Based on the pictures I think the height is less than 23mm, because the spare interposer area at the top edge seems to be more than 0.5mm.
 
Back
Top