Bondrewd
Veteran
No.They may do that for the Pro line/Apple MPX modules, like Navi 12.
How much is 384b@16Gbps?So what’s the current speculation for VRAM bandwidth on Navi 21 with GDDR6?
768GB/s or so isn't it?
No.They may do that for the Pro line/Apple MPX modules, like Navi 12.
How much is 384b@16Gbps?So what’s the current speculation for VRAM bandwidth on Navi 21 with GDDR6?
Yes.Isn't sienna's child Navi 21
No.which has HBM confirmed?
Can you please elaborate? Because AMDGPU driver code commits for Linux kernel 5.9 are saying an opposite.
They also say this.Because AMDGPU driver code commits for Linux kernel 5.9 are saying an opposite.
They did, where it matters, see MI100.
Client gets simple G6 setup and a fancy new uArch focused on power and bandwidth efficiency and all that jazz.
They've promised both and they're not the ones to not deliver.Hopefully all that jazz means performance and features too.
I wouldn’t call an unused macro in the patch “confirmed” HBM, at most alleged, especially with their habit of cloning code for existing chips to bootstrap new chips.Can you please elaborate? Because AMDGPU driver code commits for Linux kernel 5.9 are saying an opposite.
I thought Samsung was selling 18Gbps in 16Gb density/capacity. That would be interesting on a 3090 competitor.No.
How much is 384b@16Gbps?
768GB/s or so isn't it?
No.I thought Samsung was selling 18Gbps
Wouldn't a 384-bit bus limit AMD to using 12 GB or 24 GB?How much is 384b@16Gbps?
768GB/s or so isn't it?
Hm... that’s a bit short for 80CUs, no?No.
How much is 384b@16Gbps?
768GB/s or so isn't it?
Who are you that you speak as though you have explicit insider info?No.
DRAM vendors routinely lie.
See 3.2Gbps HBMs getting announced but not existing anywhere in any way, shape or form one year after the said announcement.
Maybe navi 22 256-bit...for big navi 21 i thought they were going hbm but guess if current HBM stacks do not fit their needs, 384-bit 16Gbps and 768GB/s offers enough bandwidth too. Dont know about ROPs, but funny thing is in that regard it could be similar to GA102 and 12/24GB, even a 6900XT 384-bit and 6900XL 320-bit 10/20GB is posible there
Honestly, not sure about your sources or insider info, hope you are right and AMD is there in the highend as Lisa promised. 384-bit makes sense if HBM stacks do not fit for the best solution now, but you also said there is some reason for navi 21 only beeing launched with a kind of "built by ATI" design and no AIB custom designs or at least not at launch or close to it, but if its not HBM, what reason could be that? and what about Navi 22 256-bit custom AIBs?GDDR6 it is.
Currently shipping HBM2E is 2.4Gbps so it's not a big win over G6@16Gbps even at three stacks.
Yeah I wanna some AIC vendor to do a 48gig N21 for kicks.
Why?
No idea, but might be fun.
Yeah.Wouldn't a 384-bit bus limit AMD to using 12 GB or 24 GB?
A bit.Hm... that’s a bit short for 80CUs, no?
Current HBM isn't really that fast unless you're going for 4+ stacks.I fully expect top range Navi to utilise hbm2 in order to maximise bandwidth without needing to utilise too much die are.
The reason is secrecy.there is some reason
AIBs can easily build HBM boards, they've done it with Vega anyway.but if its not HBM
Coming at launch as usual like most 2nd wave AMD chips always do.what about Navi 22 256-bit custom AIBs?
Sorry, I don't get it.They also say this.
https://lists.freedesktop.org/archives/amd-gfx/2020-June/050059.html
Guess what the fuck is it actually running.
Sorry, I don't get it.
What am I supposed to see in that firmware header code commit?