AMD: Navi Speculation, Rumours and Discussion [2019-2020]

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Thanks to PS5 specs, all points to rdna 2 could carry some impressive clocks, biggest jump since pascal. This GCN-RDNA-RDNA2 reminds 2008-2009 era when amd "simplified" R600 arquitecture pipeline for better clocks and gaming performance with HD 4870 and HD 5870. On the other side and apart from the node, nvidias current gpu seems not so simple or clock friendly as 680, maxwell and pascal were.

To be the fair I believe the belief is that the PS5 has had so many revisions / respins on its silicon to reach that clock speed it didnt start like that.
 
Silly season is upon me.
I got a weird feeling AMD did a RV770 move again, everyone expecting a doubling of CUs to 80CUs, and they went a bit further.
I've always liked the 96CU(8x12,6x16) could potentially work well with HBM2 4096/3072bit or GDDR6 512bit/384bit.
 
Silly season is upon me.
I got a weird feeling AMD did a RV770 move again, everyone expecting a doubling of CUs to 80CUs, and they went a bit further.
I've always liked the 96CU(8x12,6x16) could potentially work well with HBM2 4096/3072bit or GDDR6 512bit/384bit.
Nah, the config is 80CUs scattered among 8SAs/4SEs.
It's in the driver code.
 
Silly season is upon me.
I got a weird feeling AMD did a RV770 move again, everyone expecting a doubling of CUs to 80CUs, and they went a bit further.
I've always liked the 96CU(8x12,6x16) could potentially work well with HBM2 4096/3072bit or GDDR6 512bit/384bit.

At what price...
 
Silly season is upon me.
I got a weird feeling AMD did a RV770 move again, everyone expecting a doubling of CUs to 80CUs, and they went a bit further.
I've always liked the 96CU(8x12,6x16) could potentially work well with HBM2 4096/3072bit or GDDR6 512bit/384bit.

Or maybe they’re sandbagging on RT and the “minimalist” approach was reserved for the consoles only with PC GPUs getting something better.
 
Wouldn't make much sense for either AMD or Sony/MS.
Unless this "super RT" method consumed a lot more power.


Though to be very clear, I don't believe in trinibwoy's speculation of AMD sandbagging on the consoles' RT. Cerny made mention of the PS5 using AMD's RT approach and Microsoft didn't make any claims on exclusive RT (like they did for e.g. VRS), so my guess is they're all using the "same" RT capabilities, at least considering general methodology and RT unit count per CU.


My speculation for RDNA2 is that it'll be:
- A lot more dense than RDNA1 regarding number of execution units per die area, even though it shares the same process (in this aspect it would indeed be similar to RV670 -> RV770);
- Clocking a lot higher than RDNA1, with desktop GPUs averaging at or above 2.2GHz.


If Big Navi is an 80 CU chip clocking at 2.2GHz and two 8GB stacks of HBM2E, then there's really no concern as to whether or not it can compete with GA102, in both absolute performance and power efficiency.
 
Though to be very clear, I don't believe in trinibwoy's speculation of AMD sandbagging on the consoles' RT
AMD itself said common RT platform between DT and console.
- A lot more dense than RDNA1 regarding number of execution units per die area, even though it shares the same process (in this aspect it would indeed be similar to RV670 -> RV770)
A bit.
Each WGP is actually smaller but ALU@mm^2 hasn't really gone up.
Clocking a lot higher than RDNA1, with desktop GPUs averaging at or above 2.2GHz.
Yeah.
Built for speed.
If Big Navi is an 80 CU chip clocking at 2.2GHz and two 8GB stacks of HBM2E
It's not HBM and two 2.4Gbps stacks aren't enough anyway.
 
Was kinda expecting them to go with 4 stacks of HBM2 for both bandwidth and power reasons.
They did, where it matters, see MI100.
Client gets simple G6 setup and a fancy new uArch focused on power and bandwidth efficiency and all that jazz.
 
Was kinda expecting them to go with 4 stacks of HBM2 for both bandwidth and power reasons.
They may do that for the Pro line/Apple MPX modules, like Navi 12.

So what’s the current speculation for VRAM bandwidth on Navi 21 with GDDR6?
 
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