So is it culling, or is it really tiling? I mean, where you have "GPU calculates tile coverage", is it actually calculating which tile each GPU spans, or is it just calculating if it's inside tile 0 or not? Either way, it's still at least screen space culling done at the geometry level (don't know about z and w) and before triangle setup/rasterization. But I don't know if this is something modern IMRs do too; I was under the impression that guard band clipping was used during scanline setup, ie post triangle setup. Is the tile bounding in Xenon clipping as well, or just culling?
I would argue that just having an explicitly addressed intermediate render output buffer that can not act directly as framebuffer means you're "tiling", for a reasonable definition of the word. You output to tile memory, which is fast, then can burst data back to the target buffers in a single resolve. The only way this data flow would occur in an IMR is if the target buffer writes are being cached, but without explicit resolves there'd be no configuration available for avoiding writeback of temporary data like depth/stencil. I assume Xenon does have the ability to not resolve these buffers, which should be another tiling advantage over IMRs.
