Intel to build future on CPU from 1995?

[Guden Oden]

From (what little) I've seen so far, it seems to me that their next CPU core will be yet another extension of the (by now very) venerable P6 design.

Is it just me, or is Intel turning into quite a one-trick pony here? Or maybe I'm barking up the wrong tree, and their next core ISN'T based on the P6... Maybe need to wait and see more first, but it sure seems to me as if they're taking the Pentium-M and modifying it a bit (adding x86-64, extending the pipe a little and jiggling with the caches somewhat) and then presenting it as something new.

 

[mczak]

From (what little) I've seen so far, it seems to me that their next CPU core will be yet another extension of the (by now very) venerable P6 design.

Is it just me, or is Intel turning into quite a one-trick pony here? Or maybe I'm barking up the wrong tree, and their next core ISN'T based on the P6... Maybe need to wait and see more first, but it sure seems to me as if they're taking the Pentium-M and modifying it a bit (adding x86-64, extending the pipe a little and jiggling with the caches somewhat) and then presenting it as something new.

I can't see anything wrong with intel using a modified P6 design. In fact intel seems to be quite innovative when it comes to cpu designs, they have currently 3 _very_ distinct (when it comes to internal structure) cores (Pentium M, P4, Itanium). It's just that those designs didn't really work that well as intended (true for both P4 and Itanic), so they go back to the more traditional P6 core (well we don't know yet how similar it will indeed look).
But, if you compare this to AMD, it's really not that different (of course, AMD doesn't have that much money to blow). AMD basically uses the same design since the K6 (which has a somewhat similar design as that P6 btw), sure K7 and K8 aren't the same chip but they share a lot of the design principles (and the K6 wasn't even developed by AMD, it was a Nexgen design).

 

[phenix]

I have been surfing through IDF news from various sites but I failed to locate anyone mentioning if Intel's new CPUs will have on-die memory controller. Did I miss this bit or Intel is intentionally don't speak about it? Not a good sign because it indicates that they don't have anything to anounce.

 

[veler]

why can't we use itaniums or something new anyway?

 

[Tim]

I have been surfing through IDF news from various sites but I failed to locate anyone mentioning if Intel's new CPUs will have on-die memory controller.

They will still use the good old FSB - no ondie memory controller from Intel before 2007.

 

[phenix]

They will still use the good old FSB - no ondie memory controller from Intel before 2007.

This sucks. I think Guden is right that Intel is blowing marketing smoke into people faces again. They are trying to make people believe that this is the biggest announcement in 5 years but in reality it is nothing new. 30% faster than Netburst? AMD didn't even bothered to counter act to Intel. I am sure they are thinking that they can beat whatever Intel will bring by their dual core CPUs.

 

[Guden Oden]

why can't we use itaniums or something new anyway?

Because itanium is crap, perhaps?

It requires vast die sizes and power useage to reach competitive performance, and then typically only on floating point workloads (on which it's actually rather fast). Integer, which is the important factor on ye average PC, is still fairly mediocre.

 

[Tokelil]

Because itanium is crap, perhaps?

It requires vast die sizes and power useage to reach competitive performance, and then typically only on floating point workloads (on which it's actually rather fast). Integer, which is the important factor on ye average PC, is still fairly mediocre.

Isn't this only true for x86 programs which has to be emulated?
The big problem AFAIK is that the instructions set is totally different, where they tried to make it more RISC to get rid of OOO unit etc. (Which of course makes it very bad at running current programs made for x86)

 

[incurable]

From (what little) I've seen so far, it seems to me that their next CPU core will be yet another extension of the (by now very) venerable P6 design.

Is it just me, or is Intel turning into quite a one-trick pony here? Or maybe I'm barking up the wrong tree, and their next core ISN'T based on the P6... Maybe need to wait and see more first, but it sure seems to me as if they're taking the Pentium-M and modifying it a bit (adding x86-64, extending the pipe a little and jiggling with the caches somewhat) and then presenting it as something new.

From the articles I've read it's a new design, the news that it's 4-issue wide from decode through retire is a pretty good sign for a completely new design. Can't wait to see some benchmarks.

 

[phenix]

# The design philosophy for the company's next-generation Pentium architecture -- which still lacks an official name -- is entirely new, Smith said. Although its inspiration was the cooler, more efficient Pentium M architecture developed by Intel's Israel Design Center, he said the new architecture is not directly derived from any previous project.
# Expect to see very modest performance gains over the lifetime of Merom/Conroe/Woodcrest. Speed is no longer key.
http://www.tomshardware.com/hardnews/20050824_111013.html

 

[Guden Oden]

Isn't this only true for x86 programs which has to be emulated?

No, native integer performance is mediocre at best, particulary considering price/performance (emulated x86 is far worse). Itanium simply isn't any damn good, it's a half-assed idea from the beginning.

 

[swaaye]

Itanium's x86 emulation used to be around a mid-range P54.

Actually this new launch reminds me of the original P7 rumors from the mid-'90s. Then Netburst showed up lol.

 

[MasterBaiter]

If I remember correctly the Pentium M has some architecture similar to the Pentium 3's, the fact that this new chip has a relation with the M series seems to infer a relation with the P3 as well.

 

[ANova]

Take the current Pentium M, add shared cache and more of it, increase fsb speeds to probably 800 MHz, factor in dual core, increase operating frequency to around 2.5-3.0 GHz and add x86-64 and SSE3 and you get the Conroe.

If you ask me, seems like it'll be quite the speedy chip. Who cares whether or not it's based on the P6 architecture, if it can deliver on the 65 watt max thermal output and maintain a performance increase relative to what you'd expect from current PMs then I'd consider it a success.

 

[MasterBaiter]

If you ask me, seems like it'll be quite the speedy chip. Who cares whether or not it's based on the P6 architecture, if it can deliver on the 65 watt max thermal output and maintain a performance increase relative to what you'd expect from current PMs then I'd consider it a success.

I wholeheartedly agree. I think Intel made a terrible move with the P4 pipeline design, and mostly for marketing purposes it seems. Enhancing the mobile chips seems like the logical thing to do, and it does seem to perform exceptionally well. It just seems that Intel has been reacting of late rather than innovating.

 

[Sxotty]

If AMD gets a greater share of the market, they intel) will probably begin to innovate more seriously

 

[Saem]

There are significant differences between Banias and the P6 uArch. Especially in the decode, scheduling and FP department.

 

[PeterAce]

Fall IDF 2005: Intel's unified processor architecture :

http://arstechnica.com/news.ars/post/20050823-5232.html

 

[Rune]

From (what little) I've seen so far, it seems to me that their next CPU core will be yet another extension of the (by now very) venerable P6 design.

Is it just me, or is Intel turning into quite a one-trick pony here? Or maybe I'm barking up the wrong tree, and their next core ISN'T based on the P6... Maybe need to wait and see more first, but it sure seems to me as if they're taking the Pentium-M and modifying it a bit (adding x86-64, extending the pipe a little and jiggling with the caches somewhat) and then presenting it as something new.

I don't see how a quad issue 14 stage pipelined mpu resembles p6 anymore than say a k7 does. Sure they are both x86 and less hyperpipelined than Netburst . What is cool is that the merom architecture will get an FMAC instruction. Something any gamer should appreciate. And why would you change something that works? Right now a 2,25 ghz Dothan scores 1812 in Specint. That is second only to a 2,8 ghz Athlon FX.

 

[incurable]

Take the current Pentium M, add shared cache and more of it, increase fsb speeds to probably 800 MHz, factor in dual core, increase operating frequency to around 2.5-3.0 GHz and add x86-64 and SSE3 and you get the Conroe.

Nope, this new arch is more than this, but I guess it'll be next year until we know more than your casual "4-issue wide end-to-end".