TSMC Execution [2024]
- Thread starter Silenti
- Start date
What's this "caught up in yields" talk? You mean you believed the BS Broadcom "news" that floated around some time ago?
Intel 18A's defect density (what actually matters) was last september (latest public info on it) at the same level as TSMC has traditionally had in similar timeframe before mass production
If Intel's 18A is in such a great shape, why is the 18A product roadmap so messed up?
- Lunar Lake was ported to TSMC's N3
- Clearwater Forest is delayed from 2025 to H1 2026
- Falcon Shores is cancelled
- Panther Lake is delayed and will be available in 2025 only in very limited quantities at the best just to keep the promised 2025 release.
- 18A for partners was delayed until mid-2026
Anyway, TSMC executives mentioned (~Q4 2023) that they expect Intel's 20A will be comparable to TSMC's N3 and Intel's 18A will be comparable to TSMC's N3P. In 2026 TSMC will be offering N2, N2P and N2X.
We don't know the defect density of TSMC or Intel (or the percentage of downtime of their machines). Just some hand wavey shit about scaling and some rare numbers which surfaced ... as if the way things scaled on ancient nodes somehow formed a law. It's perfectly possible, even likely, that EUV defect density and yield does not in fact scale as in the past and runs into bottlenecks for Samsung and Intel but not TSMC.
It may be later than originally planned, but your list includes things not necessarily related to that, like Falcon Shores.
Anyway, there's big enough names to clear some things around it here: https://overclock3d.net/news/misc/rumoured-abysmal-10-yield-for-intel-18a-is-fake-news/
Potato Head
Newcomer
Intel 20A was cancelled seven months ago, so I think you are working from old rumors.
What does the cancellation of 20A seven months ago have to do with a statement by a TSMC official (not a rumor) about the state of the competitive process?
Since process nodes are now mostly in names only, it's very difficult to compare nodes without detailed information, and public information of nodes' parameters are now very rare.
For Intel's 18A, we know they did a session in ISSCC 2025, talking about its SRAM cell size as 0.021um^2. That's basically all we have from them.
By comparison, TSMC's N3 high density SRAM cell size is 0.0199 um^2, while N3P's high density SRAM cell size is 0.021um^2. So they are comparable in this metrics, although SRAM size is only one metric and is not necessarily related to performance. However, I think this serves well as a general idea on how these nodes are in comparison.
For Intel's 18A, we know they did a session in ISSCC 2025, talking about its SRAM cell size as 0.021um^2. That's basically all we have from them.
By comparison, TSMC's N3 high density SRAM cell size is 0.0199 um^2, while N3P's high density SRAM cell size is 0.021um^2. So they are comparable in this metrics, although SRAM size is only one metric and is not necessarily related to performance. However, I think this serves well as a general idea on how these nodes are in comparison.
