Only if you throw a little thing called launching 7-9 months after your competition out of the window.
NVIDIA GF100 & Friends speculation
- Thread starter Arty
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@BZB: Hmmm, I made no reference to Nvidia's execution or any of the other things you're bringing up. Putting words in my mouth won't change that. I responded only to your prediction of them losing money. Don't make things more complicated than they need to be
Because that's the only determinant of Nvidia's financial results? I have no idea how well/poorly G92 and GT2xx are doing. All I know is that on the last conf call they said results will be flat. That doesn't translate into "going to the poorhouse" from where I stand.
Only if you throw a little thing called launching 7-9 months after your competition out of the window.
Because that's the only determinant of Nvidia's financial results? I have no idea how well/poorly G92 and GT2xx are doing. All I know is that on the last conf call they said results will be flat. That doesn't translate into "going to the poorhouse" from where I stand.
That was not my line of thinking, should have made clearer first up. Sorry for that.
My reason for hypothesizing along those lines is a bit more... mundane. My guess is that, even for ASICs like GPUs, which have a lot of cut paste structures, the larger die size per unit engineering effort leads to longer design cycles. IOW, all other things being equal, a 5770 will have a shorter design cycle than a 5870, even though one is just half of other. I will be happy to know your thoughts on this matter.
Besides, prior to GT200, nv and amd were both chasing the halo, so if you took as long as the next guy, your product won't be really be late. From G92 onwards, AMD has had smaller chips throughout. GT200->GF100 A3 was ~21 months. GT200b->GF100B1 is ~18 months. R600->RV770 was ~15 months. RV770->RV870 was ~15 months. GT200 was the first product to go up against a product of sweet-spot. It's relative delay allowed AMD to catch up after R600. Fermi allowed AMD a lead of >6 months.
IMHO, seen in this light, the "unmanufacturability" looks more like a case of simply being late wrt competition. For all we know, B1 could very well fix the clocks, yields and power. And GT200b was a very good part in it's own niche. G80 being the only part of a family of architectures to come on time also fits nicely with this. It was the only part which didn't face a small competitor, so it's the only one to look on time.
And no, correlation does not imply causation.
So it's a top to bottom overhaul, but not a new architecture. Understood.
Just one small question. Is Fermi a new architecture wrt GT200?
80% of TSMC's 40 nm production will be amazing to NV. This seems to coincide with the rumour that NV lean on it to dilute the advantage of AMD RV870 family.
FrameBuffer
Banned
duh.. of course it is.. Fermi has "Cuda Cores".. GT200 doesn't ..
ie "Cuda Cores" = new architecture /wink
Hmm...maybe I didn't express myself very well
What I meant was that I believe it to be an overhaul as you described and not a new architecture.
How often do any of these companies make an almost new architecture? These are always overhauls. Dont be fooled by using black and white to distinguish steps in an evolutionary process.
How many times we have seen such a redesign like GF100? New shader cores, cache hierarchy with L2 and L1 cache, unified r/w L2 cache, new front-end with 4 setup-engines, new geometry setup (OoO execution), TMUs in the shader core, every SM has a dual dispatcher...
That's a big step for nVidia.
Jawed
Legend
RV770's just refined really, not a new architecture. Halving the width/throughput of the TUs, doubling-up the Zs, dedicating TUs to SIMDs (like R580) and ditching the ring-bus (an optional feature of R5xx and R6xx architectures) don't make a new architecture in my view.
Will AMD ever do a "new GPU architecture"? If APUs (or SoCs for NVidia) are the only places where "GPU functionality" exists in 7+ years' time, is there time for AMD to do another blank-slate GPU? What for when they're destined to be SIMDs + cache?
I think AMD's just going to continue refining, adding, cutting pieces - evolution. An "RBE kernel" using atomics on L1 is the big step between here and GPU oblivion in my view. That hardly requires a new architecture. Just delete the fixed function RBE stuff when the ALUixel ratio gets high enough. Texturing will go the same way, just it'll take an even higher ratio, ALU:B (because of compressed texels).
NVidia went with distributed parallel setup as part of the GPC-centric re-working for Fermi. Does this offer an advantage over centralised parallel setup (was it a key motivator in building the cache system), or is it merely possible once you've built the full scale cache system? If AMD needs higher setup rate, or less bottlenecks in triangle processing, are the required changes going to look like a new architecture? Is GDS a key to bottleneck issues in Evergreen? etc.
Jawed
Will AMD ever do a "new GPU architecture"? If APUs (or SoCs for NVidia) are the only places where "GPU functionality" exists in 7+ years' time, is there time for AMD to do another blank-slate GPU? What for when they're destined to be SIMDs + cache?
I think AMD's just going to continue refining, adding, cutting pieces - evolution. An "RBE kernel" using atomics on L1 is the big step between here and GPU oblivion in my view. That hardly requires a new architecture. Just delete the fixed function RBE stuff when the ALU
ixel ratio gets high enough. Texturing will go the same way, just it'll take an even higher ratio, ALU:B (because of compressed texels).NVidia went with distributed parallel setup as part of the GPC-centric re-working for Fermi. Does this offer an advantage over centralised parallel setup (was it a key motivator in building the cache system), or is it merely possible once you've built the full scale cache system? If AMD needs higher setup rate, or less bottlenecks in triangle processing, are the required changes going to look like a new architecture? Is GDS a key to bottleneck issues in Evergreen? etc.
Jawed
So, if you think that nothing is a new architecture, you definitely think that RV670 -> RV770 isn't a new architecture correct ?
Which was my point. Not sure why you quoted me, when you were somewhat agreeing with me
I got the impression that the close proximity of the fixed function geometry hardware to the shader core was as big a deal as the parallelization itself. Or is moving data into/out of a central geometry hub not a big deal assuming all the cache bits are in place?
For better or worse, I think we are tumbling towards SIMDs+cache.
I think AMD's just going to continue refining, adding, cutting pieces - evolution. An "RBE kernel" using atomics on L1 is the big step between here and GPU oblivion in my view. That hardly requires a new architecture. Just delete the fixed function RBE stuff when the ALU
And what about setup+raster?
Not top to bottom, but definitely a overhaul to catch and fix the problems that plagued R600/RV670.
rpg.314 said:
They're quite a bit different aren't they ? Different cache system, ECC support, SP and DP done on the same units, the GPCs. Quite a stretch from what was done from RV670 to RV770. Even more than RV770 to RV870.
Maybe we just have different views on what a new architecture is. Obviously Fermi has some concepts that do not differ architecturally, from previous generations, which you can argue means that it isn't an entirely new architecture, but the differences it has over previous generations is quite big. The biggest since G71 to G80. And that's something I just don't see with RV670 to RV770.
Jawed
Legend
See Larrabee.
Apparently because you see a similar SIMD structure you think that this is the same architecture - given that Fermi has the same shader execuction mechanism as G80 and a similar mechanism for the shader clustering, do you not see Fermi as the same architecture?
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